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V: 1.0 Revised: Jan. 2018
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Appendix
4. Data Field
Data field contains the data that terminals need to complete the request and the data
that terminals respond to the request. This Data may be a numerical value, address or
setting. For example, Function Code tells the terminal to read one register, Data Field
needs to specify from which register and how many registers to read.
5. Error Check Field
The field allows the error check by master and slave devices. Due to electrical noise and
other interfaces, a group of data may be changed while transmitting from one location
to the other. Error Check ensures master or slave devices do not respond to the distorted
data during the transmission, which enhance the system security and efficiency. Error
Check uses 16-bit Cyclic Redundancy Check (CRC 16).
6. CRC Check
Every message includes an error checking field which is based on the Cyclical
Redundancy Check(CRC) method. The CRC field checks the contents of the entire
message. It is applied regardless of any parity check method used for the individual
characters of the message. The CRC field is two bytes long, containing a 16-bit binary
value. The CRC value is calculated by the transmitting device, and is appended to the
message.
The receiving device recalculates the CRC value during reception of the message, and
compares the calculated value to the actual value it received in the CRC field.
An error will be reported if the two values are not equal. CRC calculation is first started by
preloading the whole 16-bit register to 1’s. The process begins by applying successive 8-bit
bytes of the message to the current contents of the register. Only the eight bits of data in
each character are used for generating the CRC. Start and stop bits, and the parity bit, do
not apply to the CRC.
When generating the CRC, each 8-bit character is exclusive ORed with the register
contents. The result is shifted towards the least significant bit (LSB), with a zero filled into
the most significant bit (MSB) position. The LSB is extracted and examined, if the LSB
equals to 1, the register is exclusive ORed with a preset, fixed value; if the LSB equals to 0,
no action will be taken. This process is repeated until eight shifts have been performed.
After the last (eighth) shift, the next 8-bit byte is exclusive ORed with the register’s current
value, and the process repeats for eight more shifts as described above. The final contents
of the register, after all the bytes of the message have been applied, the final contents of
the register, which should exchange the high-byte and low-byte, is the CRC value. When
the CRC is appended to the message, the low-order byte is appended first, followed by
the high-order byte.
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