ADLINK Technology SMARC LEC-MTK-I1200 - Page 25

LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
Page 25 copyright © 2023 ADLINK Technology Inc.
Name
Pin
#
Description
I/O
Name
Pin #
Description
LCD1_BKLT_PWM
S122
Secondary panel brightness control through
pulse width modulation (PWM)
O
CMOS
1.8V
Runtime
Not supported
DSI1_TE
S113
Secondary DSI panel tearing effect sigal
I
CMOS
1.8V
Runtime
Not supported
I2C_LCD_DAT
S140
DDC data line used for flat panel detection
and control
I/O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if 2 DSI panels are used
I2C_LCD_CK
S139
DDC clock line used for flat panel detection
and control
O OD
CMOS
1.8V
Runtime
PU 2k2
Possible conflict if 2 DSI panels are used
4.3.1.2 eDP0 mode
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
eDP0_TX0+
eDP0_TX0-
eDP0_TX1+
eDP0_TX1-
eDP0_TX2+
eDP0_TX2-
eDP0_TX3+
eDP0_TX3-
S125
S126
S128
S129
S131
S132
S137
S138
Primary 4-lane eDP differential pair data lines
O LVDS
DP
Runtime
AC coupled off module
eDP0_AUX+
eDP0_AUX-
S134
S135
Primary bidirectional channel used for link
management and device control
O LVDS
DP
Runtime
AC coupled off module
LCD0_VDD_EN
S133
Primary panel power enable, active high
O
CMOS
1.8V
Runtime
LCD0_BKLT_EN
S127
Primary panel backlight enable, active high
O
CMOS
1.8V
Runtime
LCD0_BKLT_PWM
S141
Primary panel brightness control through
pulse width modulation (PWM)
O
CMOS
1.8V
Runtime