ADLINK Technology SMARC LEC-MTK-I1200 - MIPI Camera Support

LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
Page 29 copyright © 2023 ADLINK Technology Inc.
4.4.2 MIPI Camera Support
4.4.2.1 CSI0 (2 lanes)
Name
Pin
#
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
CSI0_RX0+
CSI0_RX0-
CSI0_RX1+
CSI0_RX1-
S11
S12
S14
S15
CSI0 differential input (point to point)
I D-PHY
/ I M-PHY
Runtime
CSI0_CK+
CSI0_CK-
S8
S9
CSI0 differential clock intput (point to
point)
I D-PHY
Runtime
I2C_CAM0_DAT
/CSI0_TX-
S7
I2C data for serial camera data
support link or differential data lane
I/O OD CMOS
/ O M-PHY
1.8V
Runtime
PU 2.2K
MIPI-CSI 2.0 uses I2C_CAM0_DAT which requires PU
MIPI-CSI 3.0 uses CSI0_TX-, no PU required
I2C_CAM0_CK /
CSI0_TX+
S5
I2C clock for serial camera data
support link or differential data lane
O OD CMOS
/ O M-PHY
1.8V
Runtime
PU 2.2K
MIPI-CSI 2.0 uses I2C_CAM0_CK which requires PU
MIPI-CSI 3.0 uses CSI0_TX+, no PU required
CAM0_PWR# /
GPIO0
P108
Camera 0 Power Enable, active low
output.
O CMOS
1.8V
Runtime
Shared with GPIO0
CAM0_RST# /
GPIO2
P110
Camera 0 reset, active low output
O CMOS
1.8V
Runtime
Shared with GPIO2
CAM_MCK
S6
Master clock output
O CMOS
1.8V
Runtime