ADLINK Technology SMARC LEC-MTK-I1200 - PCle Ports

LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
Page 34 copyright © 2023 ADLINK Technology Inc.
4.4.4.1 PCIe Ports
LEC-MTK-i1200 has several mixing options to provide different PCIe configurations:
- Single lane PCIe A, Dual lane PCIe B
- Single lane PCIe A,B,C
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU / PD
Comments
PCIE_A_TX+
PCIE_A_TX-
P89
P90
Differential PCIe link A transmit data pair
O LVDS
PCIE
Runtime
Series AC coupled on module
PCIE_A_RX+
PCIE_A_RX-
P86
P87
Differential PCIe link A receive data pair
I LVDS
PCIE
Runtime
Series AC coupled off module
PCIE_A_REFCK+
PCIE_A_REFCK-
P83
P84
Differential PCIe Link A reference clock
output
O LVDS
PCIE
Runtime
PCIE_A_RST#
P75
PCIe Port A reset output
O
CMOS
3.3V
Runtime
PCIE_A_CKREQ#
P78
PCIe Port A clock request
I OD
CMOS
3.3V
Runtime
Can be used for power saving mode on PCIe -
Pulled up or terminated on Module
PCIE_B_TX+
PCIE_B_TX-
S90
S91
Differential PCIe link B transmit data pair
O LVDS
PCIE
Runtime
Series AC coupled on module
PCIE_B_RX+
PCIE_B_RX-
S87
S88
Differential PCIe link B receive data pair
I LVDS
PCIE
Runtime
Series AC coupled off module
PCIE_B_REFCK+
PCIE_B_REFCK-
S84
S85
Differential PCIe Link B reference clock
output
O LVDS
PCIE
Runtime
PCIE_B_RST#
S76
PCIe Port B reset output
O
CMOS
3.3V
Runtime
PCIE_B_CKREQ#
P77
PCIe Port B clock request
I OD
CMOS
3.3V
Runtime
Can be used for power saving mode on PCIe -
Pulled up or terminated on Module