ADLINK Technology SMARC LEC-MTK-I1200 - Page 33

LEC-MTK-i1200 User’s Guide SGET SMARC Rev 2.1
Page 33 copyright © 2023 ADLINK Technology Inc.
Name
Pin #
Description
I/O
Type
I/O
Level
Power
Domain
PU /
PD
Comments
USB3+
USB3-
S68
S69
USB differential data pairs for port
3
I/O
USB
USB
Standby
From USB 3.1 HUB
USB3_SSRX+
USB3_SSRX-
S65
S66
Receive signal differential pairs for
SuperSpeed on port 3
I
USB SS
USB SS
Standby
DC blocking capacitors 100nF shall be placed on the
Carrier
USB3_SSTX+
USB3_SSTX-
S62
S63
Transmit signal differential pairs
for SuperSpeed on port 3
O
USB SS
USB SS
Standby
DC blocking capacitors 100nF shall be placed on the
Carrier
USB3_EN_OC#
P74
USB over-current sense for port 3
I/O OD
CMOS
3.3V
note
1
Standby
PU 10k
Pulled low by Module OD driver to disable USB3 power.
Pulled low by Carrier OD driver to indicate over-current
situation.
USB3_VBUS_DET
S37
USB port 3 host power detection,
when this port is used as a device.
I
USB VBUS
5V
USB VBUS
5V
Standby
USB3_OTG_ID
S104
Input pin to announce OTG device
insertion on USB 3.0 port
I
CMOS
3.3V
Standby
USB4+
USB4-
S35
S36
USB differential data pairs for port
4
I/O
USB
USB
Standby
From USB 3.1 HUB
USB4_EN_OC#
P76
USB over-current sense for port 4
I/O OD
CMOS
3.3V
note
1
Standby
PU 10k
Pulled low by Module OD driver to disable USB4 power.
Pulled low by Carrier OD driver to indicate over-current
situation.
USB5+
USB5-
S59
S60
USB differential data pairs for port
5
I/O
USB
USB
Standby
USB5_EN_OC#
S55
USB over-current sense for port 5
I/O OD
CMOS
3.3V
note
1
Standby
PU 10k
Pulled low by Module OD driver to disable USB5 power.
Pulled low by Carrier OD driver to indicate over-current
situation.
Note:
1. 3.3V or switched 3.3V — when an USB channel is not used, then USB[0:5]_EN_OC# pull-up rails may be held at GND to prevent current leak.
2. USB0 directly connects to the SoC and offers OTG, others share bandwidth through an USB 2.0/3.1 hub.