Allen-Bradley 1763-L16BBB - Page 461

Publication 1763-RM001C-EN-P - October 2009
MicroLogix 1100 Memory Usage and Instruction Execution Time 461
Execution Times for the Indirect Addresses
For most types of instructions that contain an indirect address(es), look up
the form of the indirect address in the table below and add
that time to
the execution time of the instruction.
[*] indicates that an indirect reference is substituted.
Execution Time Example – Word Level Instruction Using an Indirect Address
Execution Time Example – Bit Instruction Using an Indirect Address
XIC B3/[*]
• XIC: 1.44 μs + 5.5 μs = 6.94 μs True case
• XIC: 1.44 μs + 5.5 μs = 6.94 μs False case
MicroLogix 1100 Controllers
Instruction Execution Time Using Indirect Addressing
Address
Form
Operand
Time (µs)
Address
Form
Operand
Time (µs)
Address
Form
Operand
Time (µs)
O:1.[*] 2.6 O:[*].[*]/2 6.6 L[*]:1/[*] 7.3
O:[*].0 2.6 O:1.0/[*] 6.8 L[*]:[*]/[*] 7.5
O:[*].[*] 2.9 O:1.[*]/[*] 7.2 T4:[*]/DN 5.5
B3:[*] 1.7 O:[*].0/[*] 7.1 T[*]:1/DN 6.6
B[*]:1 2.7 O:[*].[*]/[*] 7.4 T[*]:[*]/DN 6.8
B[*]:[*] 3.0 B3:[*]/2 5.5 T4:[*].ACC/2 5.5
L8:[*] 2.0 B[*]:1/2 6.6 T[*]:1.ACC/2 6.6
L[*]:1 2.9 B[*]:[*]/2 6.8 T[*]:[*].ACC/2 6.8
L[*]:[*] 3.1 B3:1/[*] 5.8 T4:1/[*] 6.0
T4:[*] not supported B3:[*]/[*] 6.2 T4:[*]/[*] 6.2
T[*]:1 not supported B[*]:1/[*] 7.3 T[*]:1/[*] 7.3
T[*]:[*] not supported B[*]:[*]/[*] 7.5 T[*]:[*]/[*] 7.5
T4:[*].ACC 1.7 L8:[*]/2 5.5 T4:1.ACC/[*] 6.0
T[*]:1.ACC 2.7 L[*]:1/2 6.6 T4:[*].ACC/[*] 6.2
T[*]:[*].ACC 3.0 L[*]:[*]/2 6.8 T[*]:1.ACC/[*] 6.3
O:1.[*]/2 6.3 L8:1/[*] 5.8 T[*]:[*].ACC/[*] 7.5
O:[*].0/2 6.3 L8:[*]/[*] 6.2
ADD Instruction Addressing ADD Instruction Times
ADD Instruction: 13.44 µs
Source A: N7:[*] Source A: 1.7 μs
Source B: T4:[*].ACC Source B: 1.7 μs
Destination: N[*]:[*] Destination: 3.0 μs
Total = 19.84 μs
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