AMD SimNow Simulator 4.4.5 - Page 226

AMD Confidential
User Manual November 21
st
, 2008
214 Appendix A
Instruction
Supported
Mnemonic
Opcode
Description
SHL reg/mem8,CL
D2 /4
Shift an 8-bit register or memory
location left the number of bits
specified in the CL register.
SHL reg/mem8,imm8
C0 /4 ib
Shift an 8-bit register or memory
location left the number of bits
specified by an 8-bit immediate
value.
SHL reg/mem16,1
D1 /4
Shift a 16-bit register or memory
location left 1 bit.
SHL reg/mem16,CL
D3 /4
Shift a 16-bit register or memory
location left the number of bits
specified in the CL register.
SHL reg/mem16,imm8
C1 /4 ib
Shift a 16-bit register or memory
location left the number of bits
specified by an 8-bit immediate
value.
SHL reg/mem32,1
D1 /4
Shift a 32-bit register or memory
location left 1 bit.
SHL reg/mem32,CL
D3 /4
Shift a 32-bit register or memory
location left the number of bits
specified in the CL register.
SHL reg/mem32,imm8
C1 /4 ib
Shift a 32-bit register or memory
location left the number of bits
specified by an 8-bit immediate
value.
SHL reg/mem64,1
D1 /4
Shift a 64-bit register or memory
location left 1 bit.
SHL reg/mem64,CL
D3 /4
Shift a 64-bit register or memory
location left the number of bits
specified in the CL register.
SHL reg/mem64,imm8
C1 /4 ib
Shift a 64-bit register or memory
location left the number of bits
specified by an 8-bit immediate
value.
SHLD reg/mem16,reg16,imm8
0F A4 /r ib
Shift bits of a 16-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD reg/mem16,reg16,CL
0F A5 /r
Shift bits of a 16-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.
SHLD reg/mem32,reg32,imm8
0F A4 /r ib
Shift bits of a 32-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD reg/me326,reg32,CL
0F A5 /r
Shift bits of a 32-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.
SHLD reg/mem64,reg64,imm8
0F A4 /r ib
Shift bits of a 64-bit destination
register or memory operand to the
left the number of bits specified in
an 8-bit immediate value, while
shifting in bits from the second
operand.
SHLD reg/mem16,reg16,CL
0F A5 /r
Shift bits of a 64-bit destination
register or memory operand to the
left the number of bits specified in
the CL register, while shifting in
bits from the second operand.