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AMD XILINX VEK280 - Page 62

AMD XILINX VEK280
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3/20/24, 12:51 PM
Unofficial Document
https://docs.amd.com/internal/api/webapp/print/d54fa025-f5b0-4797-be6e-41b3e31f9548
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zSFP+ Control Signals
The zSFP+ control signals can be asserted in multiple ways. The zSFP+ has an I2C
connection to the I2C0 bus through the I2C multiplexer (TCA9548PWR U33) as
shown in the PMC MIO[46:47] I2C0 Bus section.
The following table lists the transceiver module control signals.
Table: Transceiver Module Control Signals
Signal Name Feature Notes Schematic Page
SFP_SDA Two-wire interface data U33 I2C MUX 29, 39
SFP_SCL Two-wire interface clock U33 I2C MUX 29, 39

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