Atari 800

IRQEN (IRQ Interrupt Enable)(D20E): This address writes data to the IRQ
Interrupt Enable bits.
D7 D6
0 disable, corresponding IRQST bit is set to 1
1
enable
DS D4 D3 D2
D1
DO
D7 Break Key Interrupt Enable
D6 Other Key Interrupt Enable
DS Serial Input Data Ready Interrupt
Enable
D4
Serial Output Data Needed Interrupt Enable
D3 Serial Out Transmission Finished Interrupt
D2 Timer 4 Interrupt Enable
D1 Timer 2
Interrupt Enable
DO Timer
1 Interrupt Enable
Enable
OS SHADOW: POKMSK (hex 10)
Use AND's and OR's
to change one bit in POKMSK without affecting
the others. Store the desired value in both IRQEN and POKMSK.
C. TV LINE CONTROL
VCOUNT (Vertical Counter)(D40B): This address reads the Vertical TV
Line Counter (8 most significant bits).
D7
V8
D6 DS D4 D3
V7
V6
vs
V4
D2 D1
V3 V2
DO
V1
VO not read.
VO Two line
resolution
supplied.
WSYNC (Wait for Horizontal Blank Synchronism - i.e. wait until start of
next TV line.)(D40A):
not used
This address sets a latch that pulls down on the RDY line to the
microprocessor, causing it to wait until this latch is automatically reset
by the beginning of horizontal blank. Display list interrupts may be
delayed by 1 line if WSYNC is used. (Used by OS keyboard click routine.)
III. 3