Digital Counter / Timer / Tach User Manual, 1st Ed.
1-800-633-0405
3-14
Power On Delay HOLD (
PondH
)
When power is applied to the CTT, the timing period setting
value SV will begin (timing up or down based on parameter
(
t modE
). At the end of the timing period both outputs will
turn ON momentarily for the time set in the output pulse width
parameter (
tout1
) or will be maintained ON if the output pulse
width parameter (
tout1
) is set to 0.00.
The leading edge of a “reset” input signal at RST1 will turn
OFF the outputs and reset the timing period. The “reset” signal
minimum pulse width is set by reset pulse width parameter
(
rtSr
).
The leading edge of a “pause” input signal at GATE or signal at
START will pause the timing period after it has been started. The
timing period will continue after the trailing edge of the “pause”
(Gate) or “start” signal.
When power is removed, both outputs will turn OFF. The last
state of the outputs and the last value of the current timing period
will be “stored” in eeprom when power is removed. When power
is reapplied the outputs will return to their last state and timing
will resume from the last value of the timing period.
CTT Timer
Power On Delay Hold
Power signal
Start signal
Pause signal
Reset
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