Automation Direct CTT-AN-A120 User Manual

Digital Counter / Timer / Tach User Manual, 1st Ed.
4-3
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In Timer + Counter Mixed Mode, timer period setting value SV1 controls Output 1 and counter setting value SV2
controls Output 2. Output 1(Timer) will turn ON momentarily for the time set in the output pulse width parameter
(
tout1
) or will be maintained ON (
tout1
set to 0.00). Output 2 (Counter) will turn ON momentarily for the
time set in the output pulse width parameter (
tout2
) or will be maintained ON depending on the output mode
selected.
CTT Timer + Counter Mixed Mode Functions
Timer Mode - Signal on Delay 1 (
Sond1
)
Counter Input Mode - Up (
UP
)
Timer Mode - Signal On Delay 1 (
Sond1
)
With power applied to the CTT, the leading edge of
an input signal at START will begin the timing period
setting value SV1 timing up or down based on parameter
(
t modE
). At the end of the timing period Output 1 will turn
ON momentarily for the time set in the output pulse width
parameter (
tout1
) or will be maintained ON if the output
pulse width parameter (
tout1
) is set to 0.00. The trailing
edge of the “start” signal has no effect on the outputs or timing
period.
The leading edge of a “reset” input signal at RST1 will turn
OFF Output 1, reset the timing period and prohibit the start
of a new timing period. The “reset” signal minimum pulse
width is set by reset pulse width parameter (
rtSr
).
The leading edge of a “pause” input signal at GATE will pause
the timing period after it has been started. The timing period
will continue after the trailing edge of the “pause” (Gate)
signal.
When power is removed, both outputs will turn OFF and the
timing period will be reset.
Counter Input Mode:
Mode F (
F
)
When the count present value PV counts up to the count
setting value SV2 Output 2 will turn ON. The count PV will
continue to increment with each input signal.
The leading edge of a “reset” input signal at RST1 will turn
Output 2 OFF, reset the count PV to 0, and prohibit an input
signal from incrementing the count PV. The trailing edge of the
“reset” signal at RST1 enables counting to begin.
The “reset” signal minimum pulse width is set by reset pulse
width parameter (
rtSr
).
Counter Output Modes:
Counter Input Mode - Counting Up (
UP
)
Each leading edge of the input signal at CP1 will increment the count present value PV by 1.
Timer + Counter Mixed Mode
999999
RESET
COUNT SV
2
OUT2
COUNT PV
TIMER + COUNTER
Counter Input Mode UP
Counter Output Mode F
0
Power signal
Start signal
Pause signal
Reset
Up
Down
0
0
SV
SV
Signal On Delay 1
t
t
Output
signal

Automation Direct CTT-AN-A120 Specifications

General

Brand	Automation Direct
Model	CTT-AN-A120
Category	Timer
Language	English