Q7T4-FP71G LCD Monitor Service Guide
Engineering Specification
5
Confidential
Pin Signal Assignment Pin Signal Assignment
1 Red video 9 PC5V (+5 volt power)
2 Green video 10 Sync Ground
3 Blue video 11 Ground
4 Ground 12 SDA
5 Cable Detected 13 H-Sync (or H+V)
6 Red Ground 14 V-sync
7 Green Ground 15 SCL
8 Blue Ground
Note-2: The pin assignment of 24-pin DVI-D connector is as below,
Pin Si
nal Assi
nment Pin Si
nal Assi
nment
1 TMDS RX2- 13 Floating
2 TMDS RX2+ 14 +5V Power
3 TMDS Ground 15 Ground
4 Floating 16 Hot Plug Detect
5 Floating 17 TMDS RX0-
6 DDC Clock 18 TMDS RX0+
7 DDC Data 19 TMDS Ground
8 Floating 20 Floating
9 TMDS RX1- 21 Floating
10 TMDS RX1+ 22 TMDS Ground
11 TMDS Ground 23 TMDS Clock+
12 Floating 24 TMDS Clock-
2.3 Video performance
Item Condition Spec OK N.A Remark
Max. support Pixel rate
135 MHz
√
Max. Resolution
1280 x 1024
√
Rise time + Fall time
< 6.25 ns
(50% of minimum pixel
clock period)
√
1280 x 1024 @ 75Hz
(max. support timing)
Settling Time after
overshoot /undershoot
< 5% final full-scale value
√
Refer to VESA VSIS
Standard V1R1
Overshoot/Undershoot
< 12% of step function
voltage level over the full
voltage range
√
Refer to VESA VSIS
Standard V1R1
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