BW Broadcast technical manual
Page 28
Technical data
almost zero. These three resistors are combined in virtual earth mixer op-amp IC4. The stereo pilot tone emerges
from the microcontroller as a 4 bit word which has sine weighting applied to it by resistors R87 to R94. At this
point, apart from 19 kHz, the pilot has no significant energy below 304 kHz. The pilot is fed through VR4 for
adjustment of the pilot level before being combined with the subcarrier at the virtual earth mixer op-amp IC4.
The complete stereo multiplex signal emerges from IC4 and is fed into a low-pass filter formed by L11,L12 and
C7-C11. This filter removes any high frequency products due to the sample rate. The filter is buffered by output
op-amp IC3 which also provides a fixed output level of +6dBu, which is fed to the multiplex output BNC socket on
the back panel, as well as to one side of the loopthrough jumper J5.
Exciter description
The principal frequency determining elements are inductor L1 and varicap diode VD1. These components,
together with transistors T4 and T5, form a cascade oscillator whose output is then buffered and amplified by RF
transistor T3. The RF output from T3 is impedance matched to the base of P.A. transistor T6 by RFT1, a 4 to 1
matching transformer. The nominal 5W power output from P.A. transistor T6 is impedance matched by coils L7
and L8 and associated capacitors C87, C92, C93 and C95 to the 50 ohm output socket CON4. A coaxial cable
carries the RF output from this socket to the RF input connector on the main power amplifier PCB.
The PLL circuit is primarily U3 which is a serially programmable PLL chip. The microcontroller U1 reads the dial
switches at power up and outputs a serial code to the PLL chip in a format that determines the output frequency
that the PLL will lock the transmitter to. If the microcontroller detects that the switches are set to 4440 then the
microcontroller will talk to the microcontroller on the control / LCD board to request the LCD display control sys-
tem stored frequency. The PLL chip delivers raw control pulses to the loop filter built around op-amp U2. The
loop filter is a low-pass filter that takes the raw rectangular differential outputs from the PLL chip and creates a DC
voltage to apply to the frequency determining component, varicap diode VD1. The main time constant in the loop
filter is formed by resistor R4 driving C67 and R5 driving C129. The high resistance of R4 and R5 allows slow
charging of C67 and C129 from the PLL chip. The DC voltage derived from the output of the op-amp will be slow
to change in response to the raw PLL pulses due to the slow charging of those capacitors. This slow DC voltage
change is converted to slow frequency change by the varicap diode. U3 is an analogue switch that shorts out the
two high resistance resistors in the loop filter to allow faster charging of C67 and C129, and so, a faster change
of the output DC voltage from the filter. This faster changing voltage can allow the transmitter to get on frequency
faster. When the transmitter is on frequency the analogue switch stops shorting out the high resistance resistors
and the slow loop takes control, which greatly improves the audio response of the transmitter. The microcontrol-
ler U1 determines when to switch the analogue switch in and out by reading the lock detect signals from the PLL
chip. The microcontroller can also use this information to switch off transistor T3 with open collector configured T2
which mutes the RF output when the transmitter is out of lock. LED9 provides visual indication of the PLL locked
condition. The front panel control system will also display the locked condition when in the frequency display
screen.
Audio is fed into the modulation input of the exciter from external multiplex input connector CON7 which is a BNC
type or from the internal stereo encoder section by having jumper J5 set to loopthrough. The modulation level can
be adjusted from the back panel by the adjustment of variable resistor VR3 which is in the feedback loop of op-
amp IC18. The output of the op-amp feeds the modulation element, varicap diode VD1, via potential divider R22
and R23.
CON2 provides an interface to the control / LCD board. This ribbon cable interface provides connections for the
alarm signals to the back panel D-type from the microcontroller on the LCD board together with connections for
the modulation level and a serial interface which provides frequency and status information between the PLL
microcontroller on the combo board and the main system microcontroller on the LCD board.
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