1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
POWER RAIL State in GC6
1V8_AON
1V8_MAIN
PEX&1.05V
NVVDD
ON
OFF
OFF
OFF
Cold boot/Optimus: 1V8_AONĺ1V8_RUNĺNVVDDĺNVVDDS ĺPEX_VDDĺFBVDDQ
GC6 2.1 Exit: 1V8_RUNĺNVVDD_LĺNVVDD_SĺPEX_VDD or 1V8_RUNĺNVVDD_LĺNVVDD_S & PEX_VDD
GC6 2.1 Control Signals
1.1V8_MAIN_EN
2.GC6_FB_EN
3.GPU_EVENT#
4.GPU_PEX_RST_HOLD#
5.SYS_PEX_RST_MON#
GPU
1V8_MAIN_EN
GC6_FB_EN
VR Complex
1V8_AON
1V8_MAIN
NVVDD
PEX&1.05V
NVVDDS
EC/PCH
GPU_PWR_EN
GPU_EVENT#
GPU_RST#
PLATFORM_RST#
SYS_PEX_RST_MON#
GPU_PEX_RST_HOLD#
GPU_PEX_RST#
FBVDD/Q
FBVDD/Q
ON
NVVDDS
OFF
GC6 2.1 - VR Complex
1. GPU_PWR_EN
2. 1V8_MAIN_EN
3. GC6_FB_EN
GPU
GPU_PWR_EN
(SYSTEM)
1V8_AON
1V8_AON
1V8_MAIN_EN 1V8_MAIN
PEX&1.05V
NVVDD
FBVDD/Q
EN
EN
EN
EN
EN
PGOOD
PGOOD PGOOD
PGOOD
GC6_FB_EN
PGOOD
Rt
2.6Amps @ 1.0V
Open VREG Type 0
PEX_VDD
Vout= Vref * (1+(Rt/Rb))
Rb
1.028V= 0.6 * (1+(6.8K/9.53K))
DG P.93 note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.
N17E
FBVDDQ
POWER ON SEQUENCE POWER OFF SEQUENCE
GPPG0_PCH_PEXVDD_EN (GPP_G0) (PEX_VDD)
GPPG11_PCH_NVVDDS_EN (GPP_G11) (NVVDDS)
GPPG10_PCH_NVVDD_EN (GPP_G10) (NVVDD)
GPPG9_PCH_NV3V3_EN (GPP_G9) (NV3V3)
GPPG8_PCH_1V8RUN_EN (GPP_G8) (1V8_MAIN)
DGPU_PWR_EN (GPP_F23) (1V8_AON)
net PCH_GPIO Voltage
NVVDDS
NVVDD
close to ICPlace resistors
FBVDDQ_SENSE
FBVDDQ_SENSE_RTN
I2CC_SCL
I2CC_SDA
GPU_NVVDD_SENSE
GPU_GND_SENSE
PEX_VDD_R
0.400
0.200
PEX_VDD_PWRGD
PEXVDD_EN
PEXVDD_EN
PEX_VDD_R
PS2_FBVDDQ_FB
<NV_NET_MAX_CURRENT> <NV_NET_MAX_CURRENT>
0.400
PWR_SRC_VINNPWR_SRC_VINN_R
PWR_SRC_VINP_R
VIN2N
VIN2P
PWR_SRC_VINP
SNN_VIN3P
SNN_VIN3N
PWR_SRC_VALID
SNN_TC
SNN_VPU
I2CC_SCL
I2CC_SDA
PWR_SRC_IMON_A0
PWR_SRC_WARN*
PWR_SRC_CRTCAL*
GND
<HDL_POWER>
GND
GND
GND
GND
GND
PEX_VDD
GND
GND
3.3V
VDD3
GND
GND
GND
GND
GND
VIN
PWR_SRC_NV_FB
NV3V3
NV3V3
1V8_AON
GND
FBVDDQ_SENSE_RTN28,66
FBVDDQ_SENSE28,66
GPU_NVVDD_SENSE28,64
GPU_GND_SENSE28,64
I2CC_SDA27,55
I2CC_SCL27,55
5V32,43,45,46,50,52,53,54,57,59,60,61
1V8_RUN14,15,24,25,28,54
3.3V2,11,27,29,42,44,45,46,47,49,50,52,53,54,57,58
VIN11,39,42,43,44,52,56,57,58,59,60,61,62
VDD35,27,30,33,36,38,39,42,44,48,50,51,52,53,54,56,58,61,62,63,65,66
PWR_SRC_NV_FB63,64,66
PEX_VDD14,26
NV3V312,13,14,27,54,63,64
NV_PEXVDD_EN29
PS2_FBVDDQ_FB66
PWR_SRC_NVS_VINNP_R63
PWR_SRC_NVS_VINN_R63
PWR_SRC_NV_VINP_R64
PWR_SRC_NV_VINN_R64
I2CC_SDA 27,55
I2CC_SCL 27,55
GPIO28_OC_WARN# 27
1V8_AON13,14,24,25,27,28,29,54,63,64,66
Title
Size Document Num ber Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[55] PEX_VDD
Custom
55 74Tuesday, March 14, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Num ber Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[55] PEX_VDD
Custom
55 74Tuesday, March 14, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Num ber Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[55] PEX_VDD
Custom
55 74Tuesday, March 14, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
PC190 3300p_50V_X7R_04
PR313 6.8K_1%_04
PJ35
*3mm
1 2
PC55
10u_6.3V_X5R_06
OpenVReg
PU11
EM5841BVT
DFN10
COMMON
1
FB
2
VCC
3
VIN
4
GND
5
GND
6
SW
7
SW
8
BOOT/NC
9
PGOOD
10
EN/FS
11
THERM
PR85 10_1%_04
PR49
*10K_04
S
D
G
Q42A
MTDK5S6R
2
61
PR324 9.53K_1%_04
PC183
22u_6.3V_X5R_08
PR78 *0402_short
S
D
G
Q42B
MTDK5S6R
5
34
PR79 10K_04
PR321
10_06
PR64 10K_04
PR87 665K_1%_04
R457
10_06
PR55 665K_1%_04
PR272 10_1%_04
PR314 *20mi l short-p
PC198
*0.1u_10V_X7R_04
PR322 10K_04
PC192 *0.01u_16V_X7R_04PR323 0_04
R483
100K_04
PC50
0.01u_50V_X7R_04
PR43 665K_1%_04
PR67 *0402_short
PC193
22u_6.3V_X5R_08
PR315 *160K_04
PC51
10u_6.3V_X5R_06
PR27 10_1%_04
INS144386293
PU1
COMMON
QFN16
INA3221AIRGV
1
VIN3N
2
VIN3P
3
GND
4
VS
5
A0
6
SCL
7
SDA
8
WARN
9
CRIT
10
PV
11
VIN1N
12
VIN1P
13
TC
14
VIN2N
15
VIN2P
16
VPU
17
PAD
PR25 10_1%_04
PR274 10_1% _04
PR86 10_1%_04
PR52 10K_04
PC60
10u_6.3V_X5R_06
PL9
2.2uH_4*4*2.0
1 2
PC184
22u_6.3V_X5R_08
PRS2
1206
RL1632T4F-B-R005-FNH
1%
COMMON
1
23
4
PC195
0.1u_10V_X7R_04
PR311 *20m il short-p
PC188
0.1u_10V_X7R_04
PR316
10K_1%_04
PC181
0.1u_10V_X7R_04
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