Clevo P950HR - Vcore & VCCGT Output 1; Vcore & VCCGT Output 2

Schematic Diagrams
B - 60 VCore & VCCGT Output 1
B.Schematic Diagrams
VCore & VCCGT Output 1
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBOOT=0.8V
FOR CV
H-line 42
unused floating.
CORE Max Switching Frequency=421Khz
,QWHO6.</$.(,09332:(5&.73+$6(
unused floating.
The unused ISENAxP pins are recommended to be connected to VCC
PSYS&OFSA
GT Max Switching Frequency=425Khz
10k ntc
VCORE IMON GT IMON
NO Load Offset
PSYS DISABLE
GT
CORE
9/21
9/21
Short
DEFAULT SHORT
DEFAULT OPEN
CPU Thermal event malfunction.
DEFAULT OPEN
DEFAULT OPEN
DEFAULT OPEN
POWER ᄅᏺଥޏሽ୲ଖ 2/18
TONSET
SET2
SET1
SET3
SETA1
SETA2
IMON IMONA
OFSA/PSYS
OFSM
VR_ENABLE
TONSETA
5V
5V
VIN
VREF_VCORE
3.3VS
VREF_VCORE
1.0V_VCCST
1.0V_VCCST
5V
VIN
5V
VREF_VCORE
5V
5V
VCCGT_R
3.3VS
VIN
VCORE_R
VREF_VCORE
VIN11,39,42,43,44,52,55,56,57,58,60,61,62
3.3VS3,9,10,11,12,13,29,30,32,33,34,35,36,38,39,40,41,42,44,48,49,50,51,52
5V32,43,45,46,50,52,53,54,55,57,60,61
1.0V_VCCST5,7,32,33,58
VCCGT_R60
VCORE_R60
PWM21 60
PWM11 60
CSN21 60
CSN11 60
DRVON160
CSP21 60
CSP11 60
H_CPU_SVIDCLK 5
H_CPU_SVIDALRT# 5
H_CPU_SVIDDAT 5
VCC_VCORE_SENSE6
VSS_VCORE_SENSE6
VCORE_PG 38
ALL_SYS_PWRGD 5,11,38,39
VCCGT_SENSE8
VSSGT_SENSE8
PSYS 62
H_PROCHOT# 5,62
PWM12 60
CSN12 60
CSP12 60
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[59] VCORE&VCCGT OUTPUT1(Power)
A3
59 74Thursday, March 09, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[59] VCORE&VCCGT OUTPUT1(Power)
A3
59 74Thursday, March 09, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[59] VCORE&VCCGT OUTPUT1(Power)
A3
59 74Thursday, March 09, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
PC115
*1000p_50V_X7R_04
PR168 680_1%_04
PC255
1u_6.3V_X5R_04
PR178
20K_04
PR134 330K_1%_06
PJ24 *1mm
1 2
PR188
4.87K_1%_04
PR396
0_04
PR358
0_04
PR171 680_1%_04
PR367 45.3_1%_04
PR361
21.5K_1%_04
PR194
0_04
PR379
*20mil short-p
PR184
*0_04
PR355
100_04
PR372
0_04
PR363 0_04
PR366
432K_1%_06
PR176 43.2K_1%_04
PC114
*1000p_50V_X7R_04
PR375 0_04
PR162 10K_06
PR360 0_04
PR392
0_04
PR200
36.5K_1%_04
PR204
22.1K_1%_04
PR179
*0_04
PC112
*1000p_50V_X7R_04
PJ21 *1mm
1 2
PC110 120pF_50V_NPO_04
PJ27
*CV-40mil
12
RT4
100k_1%_04_NTC
1 2
PR373
17.8K_1%_04
PR359 49.9_1%_04
PR185 10K_04
PR165
100_04
PR191
100_04
PR362
5.9K_1%_04
PR198 0_04
PR357
1_04
PR175 10K_1%_04
PJ22 *1mm
1 2
PR174
100_04
PR354
*20mil short-p
PC111
4.7u_6.3V_X5R_04
PR167 10K_1%_04
PR205 0_04 PR199 0_04
PR192 *0402_short
PR150 1_1%_06
PR391
56K_1%_04
PR181
*20mil short-p
PR374
0_04
PC100 220p_50V_NPO_04
PC106
*1000p_50V_X7R_04
PR368
80.6K_1%_04
PR144 100K_1%_04
PR370 0_04
PR148 499K_1%_06
PJ16 *1mm
1 2
PR180
100_04
PC109 470p_50V_NPO_04
PR190
806_1%_04
PC108
*1000p_50V_X7R_04
PR356
100K_1%_04
PJ26
*1mm
1 2
PR186
*0_04
C524
*0.1u_10V_X7R_04
PR189 0_04
PR211
42.2K_1%_04
PR187 0_04
PC99 82p_50V_NPO_04
PR371
200K_1%_04
PR212 2K_1%_04
PR135 1_1%_06
PR378
2.37K_1%_04
PR151 560K_1%_06
RT5
EWTF02-103F3I-N
1 2
PR206
*1K_1%_04
PC103
*1000p_50V_X7R_04
PR386
1K_1%_04
PR149
10K_06
PR397
11K_1%_04
PC249
0.47u_16V_X7R_06
PR387 *20mil short-p
PR364
10K_1%_04
PR166 18K_1%_04
PC90
0.22u_50V_Y5V_06
PR377
33.2K_1%_04
PR365
10K_1%_04
RT2
100k_1%_04_NTC
1 2
PR208 100_04
PC95 0.1u_16V_X7R_04
PR177
1_06
PR376
432K_1%_06
PJ28 *OPEN_4m il
1 2
PR163 10K_06
PR193 10_04
PR153 680_1%_04
PR207 *45.3_1%_04
PC97
0.22u_50V_Y5V_06
PR369 0_04
RT3
100k_1%_04_NTC
1 2
PR197
31.6K_1%_04
PJ25
*CV-40mil
12
GND
57%(
57%(57%(
57%(
PU6
RT3606BEGQW
ISEN3N
3
PS4
43
VCLK
23
IMONA
19
VSEN
10
ISEN2N
7
ISEN3P
2
ISEN1N
4
NC
40
SET2
13
COMPA
31
FBA
32
RGNDA
29
SETA2
16
VSENA
30
OFSA/PSYS
26
IBIAS
28
ISENA1P
35
SET1
12
PGOOD
47
SETA1
15
PWMA1
42
EN
24
ISEN2P
6
ALERT#
21
ISEN1P
5
IMON
17
COMP
9
ISENA2P
34
ISENA2N
33
FB
8
RGND
11
VCC
27
TSEN
1
VDIO
22
GND
49
DVD
39
ISENA1N
36
PWMA2
41
PWM3
46
PWM1
45
PWM2
44
SET3
14
OFSM
25
TONSET
48
TONSETA
38
TSENA
37
V06
18
VRHOT
20
Sheet 59 of 74
VCore & VCCGT
Output 1