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Clevo P950HR - Pch 1;9; Pch 2;9

Clevo P950HR
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Schematic Diagrams
PCH 1/9 B - 31
B.Schematic Diagrams
PCH 1/9
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC Wake UP
BIOS + ME ROM 8MB
BOOT HALT
ENABLE:LOW
(INTERNAL WEAK PD)
CONSENT STRAP
ENABLE:LOW
(INTERNAL WEAK PU)
JTAG ODT
DISABLE:LOW
(INTERNAL WEAK PU)
PESONALITY STRAP
ENABLE:LOW
(INTERNAL WEAK PU)
ESPI FLASH SHARING MODE
MASTER ATTACHED FLASH SHARING:LOW
SLAVE ATTACEHD FLASH SHARING:HIGH
(INTERNAL WEAK PD)
GPP_G_14_GSXDIN:
DMI AC COUPLING FULL VOLTAGE MODE
WHEN SAMPLED LOW
SPI_* = 1"~6.5"
NEW
64M
GD:6-04-02564-A75
MXIC:6-04-25647-490
WINBOND: 6-04-02564-470
SPI_SI_M
SPI_SO_M
SPI_SCLK_M
HSPI_MSI
HSPI_MSO
HSPI_SCLK
HSPI_CE#
HSPI_CE#
HSPI_MSO
HSPI_SCLK
SPI_WP# SPI_CS0#
SPI_HOLD#
HSPI_MSI
HSPI_MSI
SPI_IO2
HSPI_MSO
SPI_IO3
GPP_H_12
SML2DATA
SML2CLK
GPP_G_14_GSXDIN
TBCIO_PLUG_EVENT
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
BT_RF_KILL_R_N
TCH_PNL_INTR_N
GPP_H_12
SPI_CS2#
SPI_IO2
SPI_IO3
SPI_WP#
SPI_HOLD#
PCH_HP_PLUG
VCC_RTC
VDD3
3.3VA
3.3VS
VDD3
HSPI_CE#39
HSPI_MSO39
HSPI_SCLK39
PLT_RST# 29,34
VDD35,27,33,36,38,39,42,44,48,50,51,52,53,54,55,56,58,61,62,63,65,66
3.3VS3,9,10,11,12,13,29,32,33,34,35,36,38,39,40,41,42,44,48,49,50,51,52,59
VCC_RTC33,36
LAN_WAKEUP#39,48,50
3.3VA5,31,32,33,34,36,38,52
HSPI_MSI39
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[30] PCH 1/12-SPI/SMBUS
A3
30 74Wednesday, March 08, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[30] PCH 1/12-SPI/SMBUS
A3
30 74Wednesday, March 08, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
Title
Size Document Number Rev
Date: Sheet
of
6-71-P9500-D02A
D02A
[30] PCH 1/12-SPI/SMBUS
A3
30 74Wednesday, March 08, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P950HP
C564
0.1u_16V_Y5V_04
R532 10K_04
R490
*4.7K_04
R487 1M_04
R488
*4.7K_04
R469 33_04
R335 33_04
SPT-H_PCH
REV = 1.3
1 OF 12
U114A
HM175_MP
INTRUDER#
BE11
GPP_H10/SML2CLK
BD34
GPP_H11/SML2DATA
AW35
GPP_H12/SML2ALERT#
BD35
GPP_H13/SML3CLK
BC35
GPP_H14/SML3DATA
BA35
GPP_H15/SML3ALERT#
BB36
GPP_H16/SML4CLK
BD39
GPP_H17/SML4DATA
BE34
GPP_H18/SML4ALERT#
BC36
GPP_B4/CPU_GP3
BD24
GPP_B3/CPU_GP2
BC23
GPP_E7/CPU_GP1
AE44
GPP_E3/CPU_GP0
AF41
GPP_G14/GSXDIN
R42
GPP_G13/GSXSLOAD
R36
GPP_G12/GSXDOUT
R39
GPP_G16/GSXCLK
P43
GPP_B13/PLTRST#
BB27
GPP_D21/SPI1_IO2
AG44
GPP_D22/SPI1_IO3
AH43
GPP_D2/SPI1_MISO
AN38
GPP_D3/SPI1_MOSI
AN41
GPP_D0/SPI1_CS#
AL39
GPP_D1/SPI1_CLK
AN36
SPI0_CS2#
AT31
SPI0_IO3
BD30
SPI0_IO2
BC29
SPI0_CS1#
AW31
SPI0_CLK
BC31
SPI0_CS0#
BD31
SPI0_MISO
BE30
SPI0_MOSI
BB29
TP1
AN17
TP2
AR19
RSVD
AE17
RSVD
AF17
RSVD
AG14
RSVD
AG15
GPP_A11/PME#
BD17
GPP_G15/GSXSRESET#
R41
R347 0_04
R331 3.3K_1%_04
R493 *0_04
R473 33_04
R470
*1K_04
R151 *2.2K_04
R471
*4.7K_04
R343 3.3K_1%_04
R558 *1K_04
R529 8.2K_04
U17
GD25B64CSIGR
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R491
*4.7K_04
R492 8.2K_04
R339 33_04
R345 33_04

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