R803 *2.2K_04
C125 0.1u_10V_X7R_04
R396 *499_1%_04
HDMI PORT
C138 0.1u_10V_X7R_04
R804
*4.7K_04
5VS11,13 ,19,20,25,29,30,31,36,37
3.3VS3,9,10,11,13,14,15,16,17,18,19,20,23,24,25,27,28, 29, 30,31, 36
R734 *20mil_04
R735 *20mil_04
C127 0.1u_10V_X7R_04
3.3VS
Parade PS8171
C675 *2.2u_6.3V_X5R_06
CEXT
CEXT
C141 0.1u_10V_X7R_04
R805 *0_04
HDMIB_D1BN
HDMIB_D0BN
HDMIB_D1BP
HDMIB_D2BP
HDMIB_D2BN
HDMIB_CLKBP
HDMIB_D0BP
HDMIB_DATA1P
HDMIB_DATA0P
HD MIB_EXT1_SCL
HDMIB_DATA1N
HDMIB_DATA0N
PIN 49=GND
HDMI_HPD-C
HD MIB_EXT1_SDA
HDMIB_CLOCKN
HDMIB_CLOCKP
HDMIB_DATA2P
HDMIB_DATA2N
FOR INTEL GRAPHIC
HDMI_CTRLCLK
HDMI_CTRLDATA
HDMI_CTRLDATA16
HDMI_CTRLCLK16
W/ level shift: 100K
W/O level shift: 20K
PORTC_HPD
R55 20K_1%_04
PORTC_HPD16
R737 *20mil_04
R736 *20mil_04
HDMIB_D1BN_C16
HDMIB_D2BN_C16
HDMIB_D1BP_C16
HDMIB_D2BP_C16
HDMIB_CLKBN_C16
HDMIB_D0BN_C16
HDMIB_CLKBP_C16
HDMIB_D0BP_C16
J_CRT1
108AH15FST04A1CC
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
GND2
GND1
RED
DCC_EN#
DDCDATA
DDCLK
R54 *4.7K_04
VSYNC
HSYNC
GRN
BLUE
W/O level shift
C7 1000p_50V_X7R_04
C15 1000p_50V_X7R_04
C9 220p_50V_NPO_04
C11 220p_50V_NPO_04
C17 *10p_50V_NPO_04
C18 10p_50V_N PO_04
C14 10p_50V_NPO_04
C13 *10p_50V_NPO_04
C19 10p_50V_NPO_04
C21 *10p_50V_NPO_04
.
L7 0_04
6-19-31001-264
.
L4 0_04
.
L6 0_04
C16 22p_50V_NPO_04
C12 22p_50V_N PO_04
C20 22p_50V_NPO_04
.
L8 FC M1005MF-600T01
.
L5 FC M1005MF-600T01
.
L3 FC M1005MF-600T01
DAC_RED16
DAC_BLUE16
DAC_GREEN16
R14 150_1%_04
R13 150_1%_04
R15 150_1%_04
DDCBUF: DDC Active Buffer enable and setting, 3 level CMOS inpu t,
internal pull-down at ~ 500k ohm
DDCBUF=LOW: No DDC act ive buffer, passive DDC lev el shifting
DDCBUF=High: Active DDC bufer enable, setting 1
DDCBUF=MID: Active DDC bufer enable, setting 2
6-20-14X30-015
U5
*PS8171
IN _D1+
39
IN _D1-
38
IN _D2+
42
IN _D2-
41
IN _D3+
45
IN _D3-
44
IN _D4+
48
IN _D4-
47
SCL
9
SDA
8
HPD/HPDX
7
OE#
25
DCC_EN#
32
CEXT/RT_EN#
10
PEQ/PC0
3
PIO/PC1
4
REXT
6
EMI0/GND[6]
27
PRE/QE_2
35
DDCBUF/OE_1
34
OUT_D1+
22
OUT_D1-
23
OUT_D2+
19
OUT_D2-
20
OUT_D3+
16
OUT_D3-
17
OUT_D4+
13
OUT_D4-
14
SCL_SINK
28
SDA_SINK
29
HPD_SINK
30
VCC[1]
2
APD/VCC[2]
11
VCC[3]
15
VCC[4]
21
VCC[5]
26
EMI1/VCC[6]
33
VCC[7]
40
VCC[8]
46
ASQ0/GND[1]
1
GND[2]
5
ASQ1/GND[3]
12
GND[4]
18
GND[5]
24
GND[7]
31
GND[8]
36
GND[9]
37
GND[10]
43
GND
49
R658 1M_04
HDMIB_EXT1_SCL
HDMI_HPD-CPORTC_HPD
Q55
MTN7002ZHS3
G
DS
HDMI_CTRLCLK
HDMIB_EXT1_SDA
R656 2. 2K_04
Q54
MTN7002ZHS3
G
DS
3.3VS
Q53
MTN7002ZHS3
G
DS
R657 2. 2K_04
HDMI_CTRLDATA
HDMIB_CLKBN
HDMIB_EXT1_SDA
RD1
*BAV99 RECTIFIER
A
C
AC
HDMI_HPD-C
RD3
*BAV99 RECTIFIER
A
C
AC
RD2
*BAV99 RECTIFIER
A
C
AC
For ESD
HDMIB_EXT1_SCL
R403
2.2K_04
R404
2.2K_04
5VS_HDMI
PEQ
PIO
C137 0.1u_10V_X7R_04
HDMIB_D2BP_M
HDMIB_CLOCKN
HDMIB_CLOCKP
HDMIB_CLKBN_M
HDMIB_CLKBP_M
HDMIB_D0BN
HDMIB_D0BP
HDMIB_D1BN_M
HDMIB_D1BP_M
HDMIB_D2BN_M
RN21
*0_8P4R_04_SHORT
1
2
3
45
6
7
8
HDMIB_D0BP_M
RN20
*0_8P4R_04_SHORT
1
2
3
45
6
7
8
HDMIB_D0BN_M
HDMIB_DATA2P
HDMIB_D1BN
HDMIB_D1BP
HDMIB_D2BN
HDMIB_D2BP
HDMIB_DATA0P
HDMIB_CLKBN
HDMIB_CLKBP
HDMIB_DATA1N
HDMIB_DATA1P
HDMIB_DATA2N
RN23
*0_8P4R_04_SHORT
1
2
3
45
6
7
8
HDMIB_DATA0N
RN22
*0_8P4R_04_SHORT
1
2
3
45
6
7
8
5VS
W/O level shift
3.3VS
R665680_04
R666680_04
R663680_04
R664680_04
TMDS_DATA1#
TMDS_DATA0
Q56
MTN7002ZHS3
G
DS
W/O level shift
5VS_HDMI_IN
HDMIB_EXT1_SCL
HDMI_CEC
HD MIB_EXT1_SDA
HDMI_HPD-C
J_HDMI1
C12817-119A5-L
SHIELD2
2
TMDS DATA1+
4
TMDS DATA1-
6
SHIELD0
8
TMDS CLOCK+
10
TMDS CLOCK-
12
RESERVED
14
SDA
16
+5V
18
TMDS DATA2+
1
TMDS DATA2-
3
SHIELD1
5
TMDS DATA0+
7
TMDS DATA0-
9
CLK SHIELD
11
CEC
13
SCL
15
DDC/CEC GND
17
HOT PLUG DETECT
19
GND
GND1
GND
GND2
GND
GND3
GND
GND4
C349
10u_10V_Y 5V_08
HDMIB_DATA0P
TMDS_DATA1
HDMIB_DATA0N
3.3VS
5VS_HDMI
HDMIB_DATA2N
C31
*0.1u_16V_Y5V_04
C30
*0.1u_16V_Y5V_04
HDMIB_DATA2P
TMDS_CLOCK#
C339
*0.1u_16V_Y5V_04
C348
10u_10V_Y 5V_08
C340
*0.1u_16V_Y5V_04
C338
*0.1u_16V_Y5V_04
TMDS_CLOCK
HMDI_INTEL
TMDS_DATA2#
R401 1_04
HMDI_INTEL
APD: Aut omatic power down managementl, 3 level CMOS input,
int ernal pull-up at ~ 500k ohm
APD=LOW: Automatic pow er down disable
APD=High: Automatic pow er down enable
APD=MID: Reserved
EMI0,EMI 1: EMI reduction and filter setting, 3 level CMOS input ,
EMI1 internal pull-up at ~ 500k ohm
EMI0 internal pull-down at ~ 500k ohm
[EMI1,EMI0]=HL: No EMI r eduction
EMI0=High: Increased ri se/fall time
MID, Increas ed rise/fall time,2nd
EMI1=LOW: EMI filter s etting 1
MID: Reserve d
TMDS_DATA2
R661680_04
R662680_04
R659680_04
R660680_04
TMDS_CLOC K
TMDS_CLOC K#
TMDS_DATA1#HDMIB_DATA1N
HDMIB_DATA1P
HDMIB_CLOCKN
HDMIB_CLOCKP
TMDS_DATA1
TMDS_DATA0#
R373 33_04
R372 33_04
CRT PORT
3.3VS
DDCLK
U33
TPD7S019
VCC_SYNC
1
VCC_VIDEO
2
VIDEO_1
3
VIDEO_2
4
VIDEO_3
5
GND
6
VCC_DDC
7
BYP
8
DDC_OUT1
9
DDC_IN1
10
DDC_IN2
11
DDC_OUT2
12
SYNC_IN1
13
SYNC_OUT1
14
SYNC_IN2
15
SYNC_OUT2
16
C311
0.22u_10V _Y5V_04
C312
0.22u_10V_Y5V_04
C313
0.22u_10V_Y5V_04
3.3VS
3.3VS
5VS_CRT
CRT_HSYNC
DDCDATA
RED
BLUE
GRN
HSYNC
VSYNCCRT_VSYNC
DAC_VSYNC16
DAC_HSYNC16
C140 0.1u_10V_X7R_04
DAC_DDCACLK16
DAC_DDCADATA16
D26
RB751S-40C2
AC
RN1
2.2K_8P4R_04
8 1
7 2
6
5
3
4
5VS
C124 0.1u_10V_X7R_04
3.3VS
R731 *20m il_04
R730 *20m il_04
R68 *0_04
R732 *20m il_04
D30
RB551V-30S2
AC
R733 *20m il_04
OE#
C126 0.1u_10V_X7R_04
EMI1
APD
3.3VS
PEQ
R781 *4.7K_04
PIO
R784 *4.7K_04
R783 *4.7K_04
R785 *4.7K_04
R790 *4.7K_04
R788 *4.7K_04
R787 *4.7K_04
R789 *4.7K_04
R782 *4.7K_04
R786 *4.7K_04
EMI0
5VS_CRT
PRE: T MDS output driver pre-emphas is level setting,
3 level CMOS input, internal pull-down at ~ 500k ohm
PRE=LOW: No pre-emphas is
PEQ: T MDS iutput equalization cont rol, 3 level CMOS input ,
i nternal pull-down at ~ 500k ohm
PEQ=LOW: Mid level EQ (Default)
PEQ=High: High level E Q
PEQ=MID: Low level EQ
HPDX: Output level and polarity of HPD is defined by PIO
PIO=LOW: HPD=HPD_SIN K@3.3V CMOS output
PIO=High: HPD=HPD_SIN K#(inverted HPD)@0.9V
PIO: Internal pull dow n ~ 500k ohm
3.3VS
ASQ1
EMI0
ASQ0
EMI1
APD
DDCBUF
PRE
R777 *4.7K_04
R776 *4.7K_04
R778 *4.7K_04
R779 *4.7K_04
R780 *4.7K_04
3.3VS
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