Clevo W25CEV - Hdmi

Sheet 12 of 47
HDMI
Schematic Diagrams
HDMI B - 13
B.Schematic Diagrams
HDMI
C367
0.1u_16V_Y5V_04
R313 1_04
C36 0.1u_10V_X7R_04
R301 3.4K_1%_04
RD1
*BAV99 RECTIFIER
A C
AC
C41 0.1u_10V_X7R_04
C49
*10u_10V_Y5V_08
R44 *20K_1%_04
R50 *0_04
RD3
*BAV99 RECTIFIER
A C
AC
HDMI PORT
J_HDMI1
1169-1A001-21U
1169-XX001
6-21-14K50-019
1169-1A001-21U
SHI ELD2
2
TMDS DATA1+
4
TMDS DATA1-
6
SHI ELD0
8
TMDS CLOCK+
10
TMDS CLOCK-
12
RESERVED
14
SDA
16
+5V
18
TMDS DATA2+
1
TMDS DATA2-
3
SHIELD1
5
TMDS DATA0+
7
TMDS DATA0-
9
CLK SHIELD
11
CEC
13
SCL
15
DDC/CEC GND
17
HOT PLUG DETECT
19
GND
GND1
GND
GND2
GND
GND3
GND
GND4
C35 0.1u_10V_X7R_04
U3
ASM1442
QFN48-7X7MM
IN_D1+
39
IN_D1-
38
IN_D2+
42
IN_D2-
41
IN_D3+
45
IN_D3-
44
IN_D4+
48
IN_D4-
47
SCL
9
SDA
8
HPD/HPDX
7
OE#
25
DCC_EN
32
RT_EN#/CEXT
10
PC0/PEQ
3
PC1/PIO
4
REXT
6
GND[6]/EMI0
27
CFG/PRE
35
DDCBUF_EN/DDCBUF
34
OUT_D1+
22
OUT_D1-
23
OUT_D2+
19
OUT_D2-
20
OUT_D3+
16
OUT_D3-
17
OUT_D4+
13
OUT_D4-
14
SCL_SINK
28
SDA_SINK
29
HPD_SINK
30
VCC[1]
2
VCC[2]/APD
11
VCC[3]
15
VCC[4]
21
VCC[5]
26
VCC[6]/EMI1
33
VCC[7]
40
VCC[8]
46
GND[1]/Reserv ed0
1
GND[2]
5
GND[3]/Reserv ed1
12
GND[4]
18
GND[5]
24
GND[7]
31
GND[8]
36
GND[9]
37
GND[10]
43
GND
49
R28 *4.7K_04
C368
0.1u_16V_Y5V_04
C38 0.1u_10V_X7R_04
RD2
*BAV99 RECTIFIER
A C
AC
C45
0.1u_16V_Y5V_04
R297 2.2K_04
HDMIB_CLKBN
HDMI_CTRLDATA[17]
HDMI_CTRLCLK[17]
R36 0_04
R308 *4.7K_04
R39 *4.7K_04
R47 *4.7K_04
R46 0_04
APD/VCC
For ASM1442(¥i½ÕÀW¼e)
3.3VS
3.3VS
5VS_HDMI
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS
5VS_HDMI 5VS
EMI1/VCC
EMI0/GND
R307 0_04
R309 *4.7K_04
RS/GND
OE#
PS8101»PPS8171®t²§
HDMIB_D1BN
HDMIB_CLKBN
HDMIB_D0BN
HDMIB_D1BP
HDMIB_D2BP
HDMIB_D2BN
HDMIB_CLKBP
HDMIB_D0BP
HDMIB_DATA1P
HDMIB_DATA0P
HDMIB_EXT1_SCL
HDMIB_DATA1N
HDMIB_DATA0N
PIN 49=GND
HDMI_HPD-C
HDMIB_EXT1_SDA
PS8171 (6-03-08171-030)
HDMIB_CLOCKN
HDMIB_CLOCKP
HDMIB_DATA2P
HDMIB_DATA2N
HDMI_CTRLCLK
HDMI_CTRLDATA
REXT
PS8171 Internal pull down 100K
W/O level shift: 20K_1%_04
PORTC_HPD
For ESD
For PS8171- 499_1%_04
PS8171 4.7K_04
PS8171 *4.7K_04
ASM1442(6-03-01442-030)
HDMIB_D1BN_C[17]
HDMIB_D2BN_C[17]
HDMIB_D2BP_C[17]
HDMIB_CLKBN_C[17]
HDMIB_D0BN_C[17]
5VS[13,14,21,27,30,32,34,39]
HDMIB_CLKBP_C[17]
HDMIB_D0BP_C[17]
HDMIB_D1BP_C[17]
3.3VS[3,9,10,11,13,14,15,16,17,18,19,20,21,25,26,27,28,29,30,31,32,33,34,39]
CEXT/RT_EN#
HDMIB_EXT1_SDA
HDMI_HPD-C
HDMIB_EXT1_SCL
R48 4.7K_04
5VS_HDMI_IN
HDMIB_EXT1_SCL
HDMI_HPD-C
HDMI_CEC
HDMIB_EXT1_SDA
D20
RB551V-30S2
AC
HDMIB_CLOCKP
HDMIB_CLOCKN
HDMIB_DATA1N
HDMIB_DATA1P
HDMIB_DATA0P
HDMIB_DATA0N
HDMIB_DATA2N
HDMIB_DATA2P
R310 0_04
R27 *4.7K_04
R35 *4.7K_04
R32 4.7K_04
R300 4.7K_04
PS8171 *4.7K_04
PS8171 *4.7K_04
PC0/PEQ
PC1/PIO
PS8171 2.2u_6.3V_X5R_04
R49 *4.7K_04
DDCBUF_EN
PRE/CF G
PRE: TMDS output driver pre-emphasis level setting,
3 level CMOS input, internal pull-down at ~ 500k ohm
PRE=LOW: No pre-emphasis
PEQ: TMDS iutput equalization control, 3 level CMOS input,
internal pull-down at ~ 500k ohm
PEQ=LOW: Mid level EQ(Default)
PEQ=High: High level EQ
PEQ=MID: Low level EQ
HPDX: Output level and polarity of HPD is defined by PIO
PIO=LOW: HPD=HPD_SINK@3.3V CMOS output
PIO=High: HPD=HPD_SINK#(inverted HPD)@0.9V
PIO: Internal pull down ~ 500k ohm
EMI0,EMI1: EMI reduction and filter setting , 3 level CMOS input,
EMI1 internal pull-up at ~ 500k ohm
EMI0 internal pull-down at ~ 500 k ohm
[EMI1,EMI0]=HL: No EMI reduction
EMI0=High: Increased rise/fall time
MID, Increased rise/ fall time,2nd
EMI1=LOW: EMI filter setting 1
MID: Reserved
APD: Automatic power down managementl, 3 le vel CMOS input,
internal pull-up at ~ 500k ohm
APD=LOW: Automatic power down disable
APD=High: Automatic power down enable
APD=MID: Reserved
PS8101»PPS8171®t²§
PORTC_HPD[17]
DCC_EN#
R51 *4.7K_04
C40 0.1u_10V_X7R_04
C375
0.1u_16V_Y5V_04
C37 0.1u_10V_X7R_04
C382
10u_10V_Y5V_08
C34 0.1u_10V_X7R_04
R31 *4.7K_04
R311
2.2K_04
C370
0.1u_16V_Y5V_04
R299 *4.7K_04
R312
2.2K_04
C39 0.1u_10V_X7R_04
R29 *4.7K_04
R40 4.7K_04
DDCBUF: DDC Active Buffer enable and setting, 3 level CMOS input,
internal pull-down at ~ 500k ohm
DDCBUF=LOW: No DDC active buffer, passive DDC level shifting
DDCBUF=High: Active DDC bufer enable, setting 1
DDCBUF=MID: Active DDC bufer enable, setting 2
C46 *2.2u_6.3V_X5R_06