R357
*1K_04
Z1402
C562 *10u_10V_Y5V_08
Zdiff = 50 Ohm ¡Ó10% (5 / 20
mils)
1.05V_LAN_M[21,23,35]
R386 *0_04
R226 *51_04
R387 *0_04
SPI_CS0#_R
R227 *51_04
R228 *51_04
HDA_RST#_R
SRTC_RST#
BIOS+ME ROM
SATA HDD
64Mbit
SPI_WP#
SPI_HOLD#
On Die PLL VR is supplied by 1.5 V f rom VccVRM when
sampled high.
SATA ODD
LPC_AD2 [28,29,33]
LPC_AD1 [28,29,33]
LPC_AD0 [28,29,33]
LPC_AD3 [28,29,33]
GPI O21
SATA_LED#
Flash Descriptor Security Overide
Low = Disabled-(Default)
High = Enabled
Zo=
50£[¡Ó15%
Z1401
HDA_SDOUT_R
GPIO13 is powered by VccSusHDA
20mil20mil
R399 *0_04
RN21
33_8P4R_04
81
72
6
5
3
4
R174 37.4_1%_04
SPI_CS1#_RSPI_CS1#
C456
15p_50V_NPO_04
RTC_X2
RTC_RST#
SPI_CS0#_R
C497
0.1u_16V_Y5V_04
PantherPoint - M
(HDA,JTAG,SATA)
SPI_SCLK_R
SPI_SI
R171 49.9_1%_04
NO REBOOT STRAP: HDA_SPKR High Enable
iTPM ENABLE/DISABLE
R401 33_04
TPM FUNCTION:SPI_SI High Enable
HDA_SPKR
R367
10M_04
HDA_SPKR
R396 33_04
R417
4.7K_04
SPI_SI_R
RTC CLEAR
R370
20K_1%_04
R381 750_1%_04
R158
1M_04
SATA_LED#
SPI_SO_R
R398 33_04
R354 10K_04
C454
15p_50V_NPO_04
R197 10K_04
SATAICOMP
SERIRQ
R162
20K_1%_04
J_RTC2
*BHAAA-BAT-063-P01
BHAAA-BAT-063-P01
-
2
+
1
R360 *1K_04
R135
1M_04
R210 *10K_04
R140 *10K_04
NO REBOOT STRAP
R355
*10K_04
JOPEN1
*OPEN_1mm
12
R214 *51_04
C
A
A
D22
BAT54CS3
1
2
3
Q11
2SK3018S3
G
D S
RBIAS_SATA3
U26
MX25L6406EM21-12G
M-SOP8B
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
R402
1K_04
R373 330K_04
R198 10K_04
RTC_VBAT_1
GPIO21
SPI_SCLK
PCH_INTVRMEN
SM_INTRUDER#
SPI_SO
SPI_SI
SPI_CS0#
R199 *1K_04
SATA3COMP
R133 1K_04
RTC_X1
RTCIHDA
SATA
LPC
SPI
JTAG
SATA 6G
U22A
Panther Point-S-QS
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED#
P3
FWH0 / LAD0
C38
FWH1 / LAD1
A38
FWH2 / LAD2
B37
FWH3 / LAD3
C37
LDRQ1# / GPIO23
K36
FWH4 / LFRAME#
D36
LDRQ0#
E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN
AM3
SATA0RXP
AM1
SATA0TXN
AP7
SATA0TXP
AP5
SATA1RXN
AM10
SATA1RXP
AM8
SATA1TXN
AP11
SATA1TXP
AP10
SATA2RXN
AD7
SATA2RXP
AD5
SATA2TXN
AH5
SATA2TXP
AH4
SATA3RXN
AB8
SATA3RXP
AB10
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
Y7
SATA4RXP
Y5
SATA4TXN
AD3
SATA4TXP
AD1
SATA5RXN
Y3
SATA5RXP
Y1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21
V14
SATA1GP / GPIO19
P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ
V5
SPKR
T10
SATAICOMPO
Y11
SATA3COMPI
AB13
SATA3RCOMPO
AB12
SATA3R BIAS
AH1
D21 RB751S-40C2
A C
R412
1K_04
3.3A_1.5A_HDA_IO
VDD3
RTCVCC
3.3V_M
5VS
3.3VS
X3
MC-306_32.768KHz
14
3 2
1.05VS
1.05VS
RTCVCC
3.3VS
3.3VS
3.3A_1.5A_HDA_IO
3.3A_1.5A_HDA_IO
3.3V_M
1.05V_LAN_M
3.3VS
R400 0_04
C498 1u_6.3V_X5R_04
R397 *1K_04
HDA_SYNC_L
HDA_SYNC_R
PCH_JTAG_TMS
PCH_JTAG_TCK_BUF
TO DOCK HDD
PCH_JTAG_TDI
PCH_JTAG_TDO
TO EC
SPI_SCLK
SPI_SI
SPI_CS0#
SATA Signal Group
Zdiff = 90 Ohm ¡Ó10% (4 / 5
ml)
BIOS ROM
32Mbit
SPI_* = 1.5"~6.5"
C460
1u_6.3V_X5R_04
C255
1u_6.3V_X5R_04
1. SPI_CLK and SPI_MOSI must be length matched to within 500 mils.
2. SPI_CLK and SPI_CS0# must be length matched to within 500 mils.
3. SPI_CLK must be 20 mils spacing from any other high frequency (>1 GHz) signal. h represents
the dielectric height.
HDA_BITCLK_R
D03
SPI_* = 1.5"~6.5"
DK_SATA_RXP5 [33]
DK_SATA_RXN5 [33]
ME_WE[29]
5VS[12,13,21,27,30,32,34,39]
3.3VS[3,9,10,11,12,13,15,16,17,18,19,20, 21,25,26,27,28,29,30,31, 32,33,34,39]
VDD3[15,16,18,19,21,23,28,29,32,33,34,35,36,41]
SATARXP2 [27]
SATARXN2 [27]
1.05VS[2,3,5, 6,15,16,19, 20,21,35,38,39]
3.3A_1. 5A_HD A_IO[21]
RTCVCC[16,21]
3.3V_M[20,23,24,34]
SATARXP0 [27]
SATARXN4 [26]
SATARXP4 [26]
HDA_SDIN0[30]
SATARXN0 [27]
HDA_SDIN1[31]
64M MXIC : 6-04-25640-490 (MX25L6406EM21-12G)
EON : 6-04-25641-490 (EN25Q64-104HIP)
WINB OND: 6-04-02564-490 (W25Q64BVSSIG)
J_RTC1
BHKB7410AP2PT
BAT-KB7410AP2P
-
2
+
1
Board ID [11]
SATARXN5
SATARXP5
SATATXP5
SATATXN5
SPI_WP#_2
SPI_HOLD#_2
SPI_SI
SPI_SCLK
SPI_SO
SPI_CS1#
D03
U28
*MX25L3206E
M-SOP8B
CE#
1
SO
2
WP#
3
VSS
4
SI
5
SCK
6
HOLD#
7
VDD
8
C468 0.01u_16V_X7R_04
C469 0.01u_16V_X7R_04
R423
*3.3K_1%_04
C470 0.01u_16V_X7R_04
R424
*3.3K_1%_04
RN4
*33_8P4R_04
8 1
7 2
6
5
3
4
µ¥ªø-n¨D
L1= 1"- 4.5"
L2= 0.5" - 2"
L3= L2 +/- 0.1"
L4= 0.5" - 2"
L5= L4 +/- 0.1"
L6= 1" - 4.5"
L7= 1.5¡¨ - 6.5¡¨
L1
6-07-15034-1A0
C471 0.01u_16V_X7R_04
C515
*0.1u_16V_Y5V_04
BIOS+ME
SPI_SO
HM70 Disable
Port1,3
W25CEW : non-VPRO:HM77 (6-S03-00771-0S2)
W25CEV : VPRO:QM77 (6-S03-00077-0S0)
eSATA
C563 *10u_6.3V_X5R_06
L6
SATATXP0 [27]
HDA_SPKR[30]
HDA_SYNC [30]
SATATXP2 [27]
SATATXN2 [27]
Use EC (BIOS+ME+EC)
Stuff
HSPI_SCLK[29]
HSPI_MSI[29]
HDA_RST# [30]
L6
HDA_SDOUT [30]
HSPI_MSO[29]
HSPI_CE#[29]
LPC_FRAME# [28,29,33]
SATATXP4 [26]
HDA_BITCLK [30]
BBS_BIT0 [18]
SATATXN0 [27]
SATATXN4 [26]
SERIRQ [28,29,33]
SATA_LED# [32]
L1
L2
L5
L4
D03
R384 *0_04
R385 *0_04
R388 *0_04
SPI_CS1#_R
HDA_SYNC_R
SPI_SCLK_R
SPI_SO_R
SPI_SI_R
Use PCH (BIOS+ME)
Stuff
D03
HDA_SYNC_L
HDA_RST#_R
HDA_BITCLK_R
HDA_SDOUT_R
SATATXN3 [27]
SATATXP3 [27]
SATARXN3 [27]
SATARXP3 [27]
mSATA
INTVRMEN- Integrated SUS 1.05V VRM Enable
High - Enable Internal VRs /Low - Enable External VRs
DK_SATA_TXP5 [33]
DK_SATA_TXN5 [33]
HDA_RST#_MDC[31]
HDA_BITCLK_MDC[31]
HDA_SYNC_MDC[31]
PCH HDA
HDA_SDO_MDC[31]
MDC
J_RTC3
*85205-02001
PCB Footprint = 85205-02L
P/N = 6-20-41100-002
1
2
CMOS Battery ®Æ¸¹
: 6-23-22015-P0D
6-23-22015-P2C
Board ID
6-86-2B002-002
L2 L1
L3
L3 L1
L7
L7
R356 1K_04
Z1403
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