Denon AVR-2113 - Page 165

165
AD8195ACPZ Block diagram
IP[3:0]
IN[3:0]
VTTI
OP[3:0]
AMUXVCC
AVEE
VTTO
AVCC
ON[3:0]
VREF_IN VREF_OUT
+
–
+
–
EQ
BUFFER
PE
CONTROL
LOGIC
4
4
4
22
4
HIGH SPEED BUFFERED
LOW SPEED BUFFERED
PE_EN
TX_EN
COMP
PARALLEL
BIDIRECTIONAL
AD8195
SCL_IN
SDA_IN
SCL_OUT
SDA_OUT
CEC_IN CEC_OUT