Denon DN-A7100 - Page 60

80
IC40 : MX29LV400TTC
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
STATE
REGISTER
MX29LV400T/B
FLASH
ARRAY
X-DECODER
ADDRESS
LATCH
AND
BUFFER
Y-PASS GATE
Y-DECODER
ARRAY
SOURCE
HV
COMMAND
DATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGM
DATA
HV
PROGRAM
DATA LATCH
SENSE
AMPLIFIER
Q0-Q15/A-1
A0-A17
CE
OE
WE
RESET
Column Addr.
Latch & Counter
Burst Length
Counter
Refresh
Interval Timer
Refresh
Counter
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Address
Register
I/O ControlTest ModeMode Register
Self Refresh Counter
Column Decoder
Sense AMP & I/O gates
512Kx16
Bank 0
Column Decoder
Sense AMP & I/O gates
512Kx16
Bank 1
RAS
CAS
CS
WE
UDQM
LDQM
CKE
Precharge
Overflow
Column Active
Row Active
Address[0:10]
CLK
BA(A11)
State Machine
Row Decoder
Row Addr. Latch/Predecoder
Auto/Self Refresh
Ref. Addr.[0:11]
Data Input/Output Buffers
Row Addr. Latch/Predecoder
IC41 : 57V161610ET7
13
9
7
5
3
20k
20k
20k
20k
16
10 14 2
1
15
11
81264
6dB
Amp
75Ω
Driver
S3
S2
S4
S1
20k
20k
20k
S5
S6
S7
Vin1
Vin2
Vin3
Vin4
Vin5
SW3 SW4
SW5
SW1SW2V
+
GND V
-
Vout3
Vout2
Vout1
6dB
Amp
6dB
Amp
75
Ω
Driver
75
Ω
Driver
■ Control Signal vs. Output Signal (L=V
CL
,H=V
CH
, X=L or H)
SW1 SW2 SW3 SW4 SW5 Vout1 Vout2 Vout3
H H Vin1 MUTE Vin1
L H Vin1 MUTE MUTE
L
H
X X
L MUTE MUTE Vin1
H Vin2 Vin2 MUTE
H L X L
L MUTE Vin2 MUTE
H Vin3 Vin3 Vin3
H H X L
L MUTE Vin3 Vin3
H H Vin4 Vin4 Vin4
H L MUTE Vin4 Vin4
L H Vin4 Vin4 MUTE
H
L
L H
L MUTE Vin4 MUTE
H H Vin5 Vin5 Vin5
H L MUTE Vin5 Vin5
L H Vin5 Vin5 MUTE
H
L
H H
L MUTE Vin5 MUTE
L L X X L MUTE MUTE MUTE
IC41 : NJM2595MTE1
IC42 : NJM2595MTE1
IC43 : NJM2595MTE1