Denon DP-59L - LF3735 PLL Speed Control Terminals (Continued); L.P.F. Output and Input; Phase Difference Detection; Test, ACL, and LCD Outputs

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L.P.F. output © |
Output
terminal
to
provide
ripple
signal
in
propor-
tion
to
the
phase
difference
to
external
Low
Pass
Filter
(L.P.F.).
L.P.F. input
Input terminal to apply output signal from external
Low Pass Filter (L.P.F.) to control voltage controlled
oscillator (VCO).
Phase difference detection output
Output terminal of generated voltage in proportion
to the phase difference of divided frequency fr
(phase ¢r} from X'tal and the frequency to set
revolution fv (phase dv}.
When phase @r is advanced from phase @v: L level
When phase @r is equal to phase @v: Open
When phase @r is delayed from phase @v: H level
3.3V
e22
0.8V
OV
t1e~33~-60us
9.9% 0% +9.9%
0.44ms
GND
Standard OV potential for GND.
TEST
Test terminal for IC. By injecting a 250Hz or more
higher frequency of clock pulse within the operating
limits to increase UP/DOWN counting thus reduces
time for operation test.
ACL
Immediately after the power is turned on, the pri-
mary input level becomes L level once prior to the
operation starts.
LCD segment S1 Output of converted
id
S2
pulses
for
indicating
-
S3
turntable
revolution
33
ue S4 or 45 and their +9.9%
_ S5 variable revolution range. |