Eaton XN300 - Page 298

35 Counter module XN-322-1CNT-8DIO
35.6 Memory layout
XN300 slice modules 02/24 MN050002EN Eaton.com 294
0x40F0 – 0x8xxA
SUB 01
1 LatchConfig
Used to configure the
latch function for the
digital inputs
Note: If multiple
inputs are configured
for the latch function,
their signals will be
OR'd.
Bit
n+1
Bit
n
0x0000
Input 1 Bit 1-0 0 0 Latch function
disabled
0 1 Latch on rising
edge
1 0 Latch on falling
edge
1 1 Latch on rising and
falling edges
Input 2 Bit 3-2 0 0 Latch function
disabled
0 1 Latch on rising
edge
1 0 Latch on falling
edge
1 1 Latch on rising and
falling edges
Input 3 Bit 5-4 0 0 Latch function
disabled
0 1 Latch on rising
edge
1 0 Latch on falling
edge
1 1 Latch on rising and
falling edges
Input 4 Bit 7-6 0 0 Latch function
disabled
0 1 Latch on rising
edge
1 0 Latch on falling
edge
1 1 Latch on rising and
falling edges
0x40F1 – 0x8xxA
SUB 03
1 EncoderConfig
Used to configure the input so that
it matches the sensor output
Bit 0 0: TTL Sensor
Output
1: RS422 Sensor
Output
0x0002
Bit 1- 7 reserved
0x40F2
(WRITE)
–0x8xx4
SUB 01
4 MaxIdleTime Max. waiting time value (count range for the waiting time
register (max. 31-bit))
This register uses the register width to define the
maximum value for the waiting time. When the maximum
value is reached, a motor stop is identified, for example.
0x0010
0x40F3 – 0x8xx4
SUB 02
1 IdleClock Cycle prescaler for determining the waiting time
Prescaler periods = Cycle [Hz] * Measuring time [sec]
0x0016
CAN
Object
Index
Default
CAN
Mapping
EtherCA
T Object
Index
Size
(byte)
Local I/O
description
Descri
ption
bits Sta
tus
Bit
n+1
Sta
tus
Bit
n
What the state
means
Local I/O
addresse
s