37
Using BIOS
DRAM Configuration
Scroll to this item and press <Enter> to view the following screen:
n (Press Enter)
Timing Mode [Auto]
Item Help
Menu Level
Phoenix-AwardBIOS CMOS Setup Utility
DRAM Configuration
x
Memclock index value or Limi DDR2 400
DQS Training Control [Skip DQS]
DCTs Mode [Ganged]
CKE base power down mode [Disabled]
CKE based powerdown [Per channel]
Memclock tri-stating [Disabled]
Auto Optimize Bottom IO [Enabled]
Bottom of [31:24] IO space E0
Bottom of UMA DRAM [31:24] [FC]
x
Timing Mode (Auto)
This item allows you to set up the DRAM timing nanually or automatically.
DQS Training Control (Skip DQS)
DQS training is used to place the DQS strobe in the center of the data eye.
DCTs Mode (Ganged)
This item is used to select the Dram ConTrollers Mode.
CKE base power down mode (Disabled)
When in power down mode, if all pages of the DRAMs associated with a CKE pin
are closed, then these parts are placed in power down mode. Only pre-charge power
down mode is supported, not active power down mode.
CKE based powerdown (Per Channel)
The DRAM channel is placed in power down when all chip selects associated with
the channel are idle.
Memclock tri-stating (Disabled)
This item enables or disables memclock tri-stating function.
Auto Optimize Bottom IO (Enabled)
This item is used to set the Auto Optimized Bottom IO.
Bottom of UMA DRAM [31:24] (FC)
This item is used to set the bottom of UMA DRAM [31:24]. We strongly
recommend that you leave this item at its default setting.
Press <Esc> to return to Advanced Chipset Features page.
F5:Previous Values F6: Fail-Safe Defaults F7:Optimized Defaults
: Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit F1: General Help
Bottom of [31:24] IO space (E0) This item is used to select the
memory that will be remapped higher than 00E0.
•
Auto, no user limit
MaxMemClk, limit by
Memory Clock value
•
Memory Clock value or Limi (DDR2 400) When DDR2 Timing
Setting by is set to Manual, use this item to set the DRAM frequency.
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