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General| Model | FBs-CB22 |
|---|---|
| Category | Controller |
| Type | Communication Module |
| Compatibility | FATEK FBs series PLC |
| Power Supply | 24V DC |
| Weight | Approx. 100g |
| Communication Ports | 1 |
Provides a comprehensive list of FBS PLC models with their specifications.
Outlines the technical specifications of the main unit, including memory and commands.
Covers digital I/O and numeric I/O expansion through cascaded units/modules, detailing limits and cable lengths.
Provides essential precautions for PLC installation, including placement and wiring to avoid interference.
Offers guidelines on wiring practices, wire gauge selection, separation of wiring, and terminal block torque.
Lists specifications and wiring diagrams for available AC power supplies like POW-14, POW-24, and FBS-EPOW.
Details specifications and wiring for DC power supplies including POW-10-D, POW-16-D, and FBS-EPOW-D.
Provides residual capacity of main/expansion units and current consumption of expansion modules for system matching.
Details the specifications for 5VDC differential and 24VDC single-end inputs, including signal voltage and current.
Details specifications for various digital output circuits: 5VDC differential, single-end transistor, relay, and TRIAC.
Discusses protection measures for digital output circuits, focusing on relays and transistors against surges and noise.
Covers essential pre-power checks, including cleaning, power type verification, and load consistency.
Explains the PLC's I/O point Disable/Enable feature for simulation, monitoring, and status checks.
Details PLC LED indicators (POW, RUN, ERR, RX, TX) and provides troubleshooting guidance for common errors.
Details the memory allocation structure in FBs-PLC, including SRAM and FBS-PACK memory.
Provides a table of digital and register allocations, including symbols, item names, ranges, and remarks.
Introduces basic and advanced function instructions, categorizing them into groups like Arithmetical and Logical Operations.
Explains the structure of function instructions, divided into input control, instruction number, operand, and output.
Describes how to use pointer registers (V, Z, P0~P9) with function instructions for indirect addressing.
Explains the Timer function (Tnnn) for timing operations, including time bases and preset values.
Details the Counter function (Cnnn) for counting operations, including types and preset values.
Describes the SET instruction to set bits of registers or coils to 1.
Explains the RST instruction to reset bits of registers or coils to 0.
Covers instructions for NC positioning control: HSPSO, MPARA, PSOFF, PSCNV.
Details instructions for enabling (EN) and disabling (DIS) interrupts and peripherals.
Explains instructions for communication: M-BUS (Modbus Master) and CLINK (Communication Link).
Explains floating point operations: I→F, F→I, FADD, FSUB, FMUL, FDIV, FCMP, FZCP, FSQR, FSIN, FCOS, FTAN, FNEG, FABS, EXT.
Explains the basic unit of step ladder diagrams: steps, their equivalence to machine movements, and sequential execution.
Introduces key step instructions: STP (step), FROM (transfer source), TO (transfer destination), and STPEND (end).
Provides essential notes and considerations for writing effective step ladder diagrams, including initial steps and branch limits.
Categorizes the main functions of FB-DAP: setter functions, FUN functions, wireless card reading, and message display.
Details setter functions for general information, including timer/counter monitoring, register monitoring, and DOC monitoring.
Explains various FUN functions like password setting, key definition, alarm address setting, and RF card operations.
