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Fibocom FM160 Series - Page 22

Fibocom FM160 Series
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FM160-NA Hardware Guide 22/27
Pin Pin Name
I/
O
Reset Value Pin Description Type
initiates an L1 exit.
Active low, open drain output, An
external pull-up resistor must be
reserved.
53 REFCLKN I -
PCIe Reference Clock signal
Differential Negative
-
54 PEWAKE# O T
Wake up system and restore PCIe
link from L2 to L0, depending on
whether the system supports
wakeup functionality.
Active low, open drain output. An
external pull-up resistor must be
reserved
3.3V/1.8V
55 REFCLKP I -
PCIe Reference Clock signal
Differential Positive
-
56 RFFE_SCLK O PD RFFE-MIPI serial clock signal 1.8V
57 GND - - GND
Power
Supply
58 RFFE_SDATA
I/
O
PD RFFE-MIPI serial data signal 1.8V
59 LAA_TX_EN O PD
A high level is output to disable 5
GHz WLAN LNAs when n79
transmitting power exceeds TBD
dBm
1.8V
60 WLAN_TX_EN I -
A high level on this pin disables
1.8V

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