FLIR LEPTON® Engineering Datasheet 
 
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available, 
and therefore, not subject to EAR.  NSR (6/14/2018). 
Information on this page is subject to change without notice. 
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
 
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Figure 16 - VoSPI Flexible Clock Rate 
 
4.2.1  VoSPI Physical Interface 
As illustrated in Figure 17, VoSPI utilizes 3 of the 4 lines of a typical SPI channel: 
•  SCK (Serial Clock) 
•  /CS (Chip Select, active low), 
•  MISO (Master In/Slave Out). 
Figure 17 - VoSPI I/O