FLIR Lepton 3.5 - Absolute Maximum Ratings; Electronic Integration Considerations; Figure 50. Example of Lepton Schematic

FLIR LEPTON® Engineering Datasheet
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available,
and therefore, not subject to EAR. NSR (6/14/2018).
Information on this page is subject to change without notice.
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
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9.4 Absolute Maximum Ratings
Electrical stresses beyond those listed in Table 18 may cause permanent damage to the device. These are stress
rating only, and functional operation of the device at these or any other conditions beyond those indicated under
the recommended operating conditions listed in Table 19 is not implied. Exposure to absolute-maximum-rated
conditions for extended periods of time may affect device reliability.
Table 18 - Absolute Maximum Ratings
Parameter
Absolute Maximum Rating
Core Voltage (VDDC)
1.5 V
Sensor Voltage (VDD)
4.8 V
I/O Voltage (VDDIO)
4.8 V
Voltage on any I/O pin
Lesser of (VDDIO + 0.6V) or
4.8V
9.5 Electronic integration considerations
A typical example of integrating a Lepton on a PCB is shown in Figure 50. Matching Cadence design files can be
found in References, page 6. The MOSI signal is not used and can be grounded.
Figure 50. Example of Lepton schematic.