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Fujitsu MB 91F467 - Ethernet

Fujitsu MB 91F467
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Preliminary 18(30)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2008-05-23 PA 6.2 Mycable01
Pin Signal Function
7 RS232_0_CTS Clear to send
8 RS232_0_RTS Request to send
9 RS232_0_RI Ring indicator
Table 2-4: Pin assignment X800 and X801
2.2.8 Ethernet
Pic. 2-12: Ethernet connector
At the RJ45 connector X600 the Ethernet interface is available.
The Ethernet interface is implemented with the 10/100 Ethernet controller LAN9218 ( U600 )
from SMSC. The LAN9218 is connected to the 32-Bit processor interface of the CPU.
The LAN9218 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant and supports
HP Auto-MDIX. The LAN9218 includes an integrated Ethernet MAC and PHY, large transmit
and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth
and high latency applications.The LAN9218 also supports features which reduce or eliminate
packet loss. Its internal 16-kByte SRAM can hold over 200 received packets. If the receive
FIFO gets too full, the LAN9218 can automatically generate flow control packets to the remote
node or assert back-pressure on the remote node by generating network collision.
The default ethernet setting by pin strapping at the SPD_SEL pin of U600 is speed 100 Mbps,
half-duplex and auto negotation enabled because this pin will be strapped to VCC by the 10k
Ohm resistor R609.
It is possible to strap this pin to ground by a 0 Ohm resistor R612 then the settings would be
speed 10 Mbps, half-duplex and auto negotiation disabled.
The FIFO_SEL pin of U600 can be strapped by 0 Ohm resistor R613 to ground.

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