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Gateway FPD 1500 - Page 22

Gateway FPD 1500
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PA1/PWM9
PA0/PWM8
PA2/PWM10
PB5*/PWM5*
PC2/CLAMP
PB3/PWM3**
PC5/AD0
PC3/HSYNCO
PC4/VSYNCO
PB4*/PWM4*
VSYNC
HSYNC
PB1/PWM1**
PB2/PWM2**
MC68HC(7)05BD1A
28-PIN DIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XTAL
PA5/PWM13
PA6/PWM14
PA4/PWM12
PA7/PWM15
EXTAL
IRQ/VPP
VDD
VSS
RESET
SDA/PC0/PWM6***
SCL/PC1/PWM7***
PB0/PWM0**
PA3/PWM11
PC2/CLAMP
PC3/HSYNCO
PC4/VSYNCO
PC5/AD0
OSCILLATOR
AND DIVIDE
BY 2
DATA
DIR
REG
PORT
C REG
EXTALXTAL
CORE
TIMER
(COP)
128/256 bytes
RAM
(256 bytes for
HC705BD1A)
3.75K/7.75K bytes
ROM
for HC05BD1A
(7.75K bytes for
HC705BD1A)
PA0/PWM8
PA1/PWM9
PA2/PWM10
PA3/PWM11
PA4/PWM12
PA5/PWM13
PA6/PWM14
PA7/PWM15
DATA
DIR
REG
PORT
A REG
RESET IRQ/VPP
Pulse
Width
Modulation
(PWM)
SYNC
PROCESSOR
HSYNC
VSYNC
VDD
VSS
STK PTR
COND CODE REG 1 1 1 I N Z CH
INDEX REG
CPU CONTROL
000 1100000
ALU
68HC05 CPU
ACCUM
PROGRAM COUNTER
CPU REGISTERS
PB0/PWM0**
PB1/PWM1**
PB2/PWM2**
PB3/PWM3**
PB4*/PWM4*
PB5*/PWM5*
6-bit ADC
PORT B REG / DIR REG
SDA/PC0/PWM6***
SCL/PC1/PWM7***
DDC12AB/
IIC
PIN CONFIGURATION
BLOCK DIAGRAM
MC68HC705BD1A HCMOS Microcontroller
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