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GE P54B - Page 606

GE P54B
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Appendix B - Settings and Signals
P54A/B/C/E
B40
P54xMED-TM-EN-1
MENU TEXT COL ROW DEFAULT SETTING AVAILABLE OPTIONS
DESCRIPTION
repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.
DDB 2015 - 1984 0B 7E 0xFFFFFFFF
High order word of long stored in 1st register
Low order word of long stored in 2nd register
[Binary Flag (32-Bit)]
Chooses whether any individual DDB's should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for
repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.
DDB 2047 - 2016 0B 7F 0xFFFFFFFF
High order word of long stored in 1st register
Low order word of long stored in 2nd register
[Binary Flag (32-Bit)]
Chooses whether any individual DDB's should be deselected as a stored event, by setting the relevant bit to 0 (zero). Typically used for
repetitive recurrent changes such as an Opto input assigned for Minute Pulse clock synchronizing.
DISTURB RECORDER
0C
00
This column contains settings for the Disturbance Recorder
Duration 0C 01 1.5
From 0.1 to 10.5 in steps of 0.01
[Courier Number (time-seconds)]
This sets the overall recording time.
Trigger Position 0C 02 33.3
From 0 to 100 in steps of 0.1
[Courier Number (percentage)]
This sets the trigger point as a percentage of the duration. For example, the default settings show that the overall recording time is set to
1.5 s with the trigger point being at 33.3% of this, giving 0.5 s pre-fault and 1s post fault recording times.
Trigger Mode 0C 03 Single
Single
Extended
[Indexed String]
If set to single mode, if a further trigger occurs whilst a recording is taking place, the recorder will ignore the trigger. However, if this has
been set to Extended, the post trigger timer will be reset to zero, thereby extending the recording time.
Analog Channel 1 0C 04 VA
IA
IB
IC
IN
IA Differential
IB Differential
IC Differential
IN Differential
Max I Bias
Ch 1 Prop Delay
Ch 2 Prop Delay
IA
IB
IC
IN
IN Sensitive
VA
VB
VC
V Checksync
Max Ih(2)
IA
IB
IC
IN
IN Sensitive
VA
VB
VC
V Checksync
IM
IA
IB
IC

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