Harris HTlFM - Page 28

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for those devices which need a"LOW"
(logic 0) during power failure.
4.8.2.
Operating Circuits
(Refer to drawing 839 7909 004.)
Control
of
the Operating Circuits is by
way
of
either Front Panel toggle switches
or Remote Control inputs. Remote Control
circuits require an open collector logic
"LOW" or
"ON"
connected between the
control input and the controller logic com-
mon. Remote Control inputs are enabled or
disabled by the REMOTE/LOCAL switch
located on the Controller front panel. Note
that all remote control command input lines
and status output lines are isolated through
opto-couplers. This provides noise and
transi
ent
immunity
for
the
Controller.
When the REMOTE/LOCAL switch is in
the LOCAL position, front panel LOCAL
LED DS 1 (red) is illuminated and a shunt
circuit exists for all
of
the Remote Control
inputs, preventing them from having any
influence on the transmitter control circuits.
When the REMOTE/LOCAL switch is not
in the LOCAL position, the shunt circuits
do not exist and the Remote Control inputs
have exactly the same functions
as
the
transmitter
front
panel
pushbutton
switches.
The requirement for an "TX ON" condi-
tion is a logic "HIGH" at the input
of
Ul0/13-7. This sets the On/off latch, inte-
grated circuit U7 A, a dual "D"-type flip-
flop. One-half is the POWER ON/OFF
Memory circuit, the other half is the Reject
Load fault memory circuit. Similarly, the
requirement for an
"OFF'
condition is a
logic "high" at the input ofUl0/11-9, which
resets the on/off latch, U7A. Diode CR19
maintains "OFF" priority for simultaneous
ON
and OFF commands. The state
of
the
on/off latch is indicated "OFF" by LED
DS4
red
and
"ON"
DS5
green.
The
ON/OFF latch is powered from the
+Bline
and will remember its state regardless
of
the
presence of line power.
The inputs and outputs
of
U7 are con-
nected to tri-state gates to prevent discharge
of
the +B line which powers them. The
output
of
the ON/OFF
latch drives the AC
line contactor relay drive transistor, Q8. The
Emitter
of
Q8 is routed to the Controller
terminal board,
TBl,
to obtain the failsafe
function. This circuit must
be
completed for
the
contactor
to
function
and
for
the
POWER ON LED DS4 to illuminate. As
long as the +B line remains higher than
3
volts, either by capacitive or battery power,
the
ON/OFF
latch will remember the state
of
the transmitter upon return
of
line power.
4-4
4.8.3.
Metering Circuits
(Refer to drawing 839 7909 004.)
A multimeter is located on the front panel
of the transmitter Controller. The following
indications may
be
selected by the multim-
eter selector switch:
a.
PAE
(PA
VOLTAGE)
b.
PA
I
(PA
CURRENT)
c.
FWD
PWR (Forward Power)
d.SWR
e. APC
f.
BATTERY TEST
Because
of
the architecture
of
this solid
state transmitter, the conventional ''plate"
metering circuits common
to
tube transmit-
ters are not used. First, since the controller
is common to all the transmitters in the
family, the current meter must sum the cur-
rent readings from the PA's. The voltmet
er
must take the average. Second, because
there is no "tuning" involved, the voltage
and current readings take a secondary im-
portance to the output power reading.
Six
functions are metered on the front
panel multimeter:
PA
voltage and current,
forward and reflected power (displayed as
SWR),
APC control voltage and BATtery
voltage. The first four are available on the
rear terminal board
as
positive ground ref-
erenced signals for remote control and mon-
itoring. All the remote-reading functions
are buffered.
When the multimeter switch selects the
PAE voltmeter position, the voltage appear-
ing at the input to voltage follower U6A,
scaled by resistor R54 appears on the 0-60
scale. The signals from precision voltage
dividers in the individual Power Amplifier
assemblies are paralleled at the input to
U6A. The effect is to make the output reflect
the average of the two samples.
If
there is
only one
PA
as
in the case
of
the
HT
250 and
500, then leaving the other connection open
has no effect on the operation
of
the circuit.
The
PA
I multimeter is a little different.
If
there is only one
PA,
the current sample
from the
PA
is applied to the input
of
non-
inverting amplifier U6B. The scaling resis-
tor and the gain of
U
6B
are such
as
to make
the full-scale reading 30A.
If
a second am-
plifier is connected, the current signal from
each is scaled by 1/2 by the divider action
of the input resistors
of
U6A and the full
scale reading is 60A. The sum
of
the current
signals is displayed.
The Transmission Line directional cou-
pler samples (Forward Power and Reflected
Power) are amplified by integrated circuits
U3A and U4A. The outputs
of
these circuits
are made available for the remote control
equipment and are connected to the multi-
meter switch S7.
888-2312-001
In
the
FWD PWR
position, this switch
connects the output
of
integrated circuit
U3A to the meter through resistor R28,
which calibrates the meter for the normal
operating power
of
the transmitter.
When the switch is operated to the SWR
position, the meter is connected to the Re-
flected Power circuit (integrated circuit
U4A) through SWR Calibrate potentiome-
ter R38, producing a meter deflection which
is read on the VSWR scale
of
the meter. The
SWR meter is calibrated by placing SWR
CAL switch, S4, in the Calibrate position.
Potentiometer R38 is then adjusted to pro-
duce the same reading on the meter
as
in the
Forward position.
4.8.4.
Overload and Alarm Circuits
(Refer to drawing 839 7909 004)
Forward Power is also connected to the
Automatic Power Control circuit and the
Power Out fault detector. The APC function
is described later. The Power Out fault is a
simple comparator which compares the out-
put power signal against a reference estab-
lished by R9, the
LOW
PWR trip set. This
allow a remote alarm to be set when the
output power falls below the trip setting.
Reflected Power is also connected to the
SWR FOLDBACK alarm output. This Set-
ting is normally established at 1.6: 1 SWR
by potentiometer R9.
The Reject Load Detector is a comparator
which monitors the voltage from the sensor
on
the Combiner reject load. Should there
be a failure
of
one
of
the two PAs (HT
lFM
only) the reject load fault latch, U7B is set,
the fault is alarmed, and the drive is reduced
to the remaining amplifier. This fault latch
can be reset by issuing another TX ON
command,
but
will
be
immediately set
again
if
the fault is not cleared.
4.8.5. Power Control Circuits
(Refer to Figure 4-5.)
The Power Control Circuits may be di-
vided into several logical groups.
The first logical circuit to be considered is
the APC Level generator. This circuit uses
digital techniques
to
derive
an
analog volt-
age which serves
as
the APC reference
level. The heart
of
the circuit is
an
eight-bit
counter consisting
of
integrated circuit U27
(lower four bits) and integrated circuit U21
(upper four bits). These counters are con-
nected in cascade and the count is changed
by providing UP or DOWN pulses to inte-
grated circuit U27. Each pulse causes the
~ounter to increment by one count in the
desired direction.
The pulses to be counted are being gener-
ated continuously by integrated circuit
Ul7F. They are shaped for a small duty-
WARNING:
Disconnect
pri,11ary
po
w
er
prior
to
servicing.