Hitachi HTS542525K9SA00 - Page 7

7.9.4 Safe handling .............................................................................................62
7.9.5 Environment ..............................................................................................62
7.9.6 Secondary circuit protection ......................................................................62
7.10. Electromagnetic compatibility.......................................................................... 63
7.10.1 CE Mark ..................................................................................................63
7.10.2 C-TICK mark ...........................................................................................63
7.10.3 BSMI mark ..............................................................................................63
7.10.4 MIC Mark ................................................................................................63
7.11. Packaging.......................................................................................................... 63
7.11.1 Substance restriction requirements ..........................................................63
8.0. General.......................................................................................................................65
8.1. Introduction......................................................................................................... 65
8.2. Terminology ....................................................................................................... 65
8.3. Deviations from standard.................................................................................... 65
9.0. Registers.....................................................................................................................67
9.1. Register set.......................................................................................................... 67
9.2. Alternate Status Register .................................................................................... 68
9.3. Command Register ............................................................................................. 68
9.4. Cylinder High Register....................................................................................... 68
9.5. Cylinder Low Register........................................................................................ 68
9.6. Data Register ...................................................................................................... 69
9.7. Device Control Register .................................................................................... 69
9.8. Drive Address Register....................................................................................... 70
9.9. Device/Head Register......................................................................................... 70
9.10. Error Register.................................................................................................... 71
9.11. Features Register .............................................................................................. 71
9.12. Sector Count Register....................................................................................... 71
9.13. Sector Number Register.................................................................................... 72
9.14. Status Register.................................................................................................. 72
10.0. General operation ...................................................................................................75
10.1. Reset response .................................................................................................. 75
10.2. Register initialization........................................................................................ 76
10.3. Diagnostic and Reset considerations................................................................ 77
10.4. Sector Addressing Mode................................................................................... 78
10.4.1 Logical CHS addressing mode ................................................................78
10.4.2 LBA addressing mode .............................................................................78
10.5. Power management features............................................................................. 79
10.5.1 Power mode .............................................................................................79
10.5.2 Power management commands ...............................................................79
10.5.3 Standby timer ...........................................................................................79
10.5.4 Interface capability for power modes ......................................................80
10.6. S.M.A.R.T. Function ........................................................................................ 81
10.6.1 Attributes .................................................................................................81
10.6.2 Attribute values .......................................................................................81
10.6.3 Attribute thresholds .................................................................................81
10.6.4 Threshold exceeded condition .................................................................81