HP 3457A - 8-23. Offset DAC; 8-24. Pre-charge Stage and Pre-charge Offset Adjust; 8-25. Input Amplifier

to connect the amplifier for a zero measurement (see Autozero in this section). The switches are
controlled by circuits in UIO] which receive their control information from the A/D Controller, U501
(schematic A2/2).
The input terminals are switched to the measurement front ends (DC, OHMS, AMPS, AC) through K101
- K104. The coil drive for these latching relays is a 15ms pulse of 5V originating in the 16 bit serial
shift register U121 (schematic A2/2). This register is composed of 16 open drain VMOS devices which
pull to ground, The register is not strobed so a strobe operation is provided through Q121 which
provides a strobed +5V to the positive side of the relay coils and U121 provides the pull-down to
ground.
Reed relays K106, K107, K201, K301 and K302 are selected by MOSFETs located in input hybrid,
UIOI. These MOSFET coil select signals, UI01 pins 27-30 and 35, are only designed to be able to pull
down; therefore, drive current is provided by QI18. The combination of Q118, R118 and C118 provide
a
power
on
delay
of
approximately
|
second
to
allow
the
MPU
(USO01)
time
to
properly
program
the
desired state at initial power on. The combination of QI19, R122 and CI17 provide protection for
U402 and UIO01 in the event of an input hybrid latch-up condition. Should a latch-up condition occur,
all
relays
could
be
on
at
the
same
time
and
U402
could
be
damaged.
To
prevent
this,
the
combination
of QI19 and R122 form a sense circuit that will detect an imminent latch-up condition and disable the
+5V
from
all
the
reed
relays
controlled
by
UIOL.
The
resistor
R122
provides
a
sense
of
the
+15V
sup-
ply
current
for
the
input
hybrid.
This
current
increases
dramatically
prior
to
the
onset
of
latch-up
and
causes
a
voltage
drop
across
R122
that
controls
the
gate
of
QI19.
QUI9
is
normally
off
except
when
UIO0L is in a latch-up condition. Should UIOI enter a latch-up condition, QI19 will turn on and this
will
rapidly
turn
off
QII8.
Resistor
R122
limits
the
+15V
supply
current
to
Ul01
during
latch-up,
thus
it protects UIOI. The following explains the various input paths.
Low Range Input Path
The low range input path consists of K106, R101 and R102 plus U10l MOSFET switch 4. The purpose
of
the
path
is
to
connect
the
HI
INPUT
terminal
to
the
input
amplifier
section.
This
path
is
used
in
the
30mV, 300mV and 3V DC volts ranges, all ranges of 2-wire and 4-wire ohms measurements and self test
measurements,
High Range Input Path
The path consists of K107 and R103 plus UIOl MOSFET switch 5 and a 100:1 divider (9.9M ohm and
100K ohm resistors), The purpose of the path is to attenuate input voltages by a factor of 100 and to
connect the attenuated voltage to the input amplifier section. This path is used in the 30V and 300V
DC ranges, 300M ohm - 3G ohm 2-wire and 4-wire ohms measurements, while command FIXNEDZ is on
and
during
self
test.
When
this
high
range
input
path
is
selected,
the
input
resistance
is
reduced
from
a
resistance
that
is
greater
than
10G
ohms
on
the
low
range
input
path
to
10M
ohms
on
this
high
range
input path.
Ohms High Sense Path
This path consists of R201 and R202 plus UI01 MOSFET switch 6. This path connects the HI OHMS
SENSE
terminal
to
the
input
amplifier
section
in
the
4-wire
ohms
function.
UI01
MOSFET
switch
6
(which is also part of the path) is used to connect the junction of U101 switch 6 to ground in all func-
tions
except
4-wire
ohms.
This
is
used
to
shunt
any
possible
voltage
on
switch
6
to
ground.
Ohms Low Sense Path
This path consists of R203 and R204 plus UI0! MOSFET switch 7. This path connects the LO OHMS
SENSE terminal to ground in the 4-wire ohms function.
HP 3457A Multimeter
8-7