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HP 3457A - Page 189

HP 3457A
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8-50.
Reading
instructions
from
ROM
U602.
To
read
instructions
from
ROM
U602,
the
microprocessor:
©
Sets
the
read/write
(R/W)
output
(U601,
pin
32)
high.
©
Sets
the
address
code
of
the
memory
location
to
be
read
onto
address
lines
AO
through
AIS.
©
For
the
ROM
to
be
enabled,
one
or
more
of
A13-15
address
lines
must
be
high.
U602
is
en-
abled
by
the
output
of
the
NOR
gate
U606a.
Being
enabled
only
when
one
of
the
address
lines,
A13-AI5,
is
high,
effectively
maps
microprocessor
memory
locations
2000-FFFF
(hex)
into
ROM
U602.
The
positive
portion
of
timing
signal
€+a
(U624a,
pin
3)
and
the
high
r/W
signal
sets
the
output
of
gate
U623a
(RD)
low
to
activate
the
output
of
ROM
U602.
The
microprocessor
then
reads
the
information
from
data
bus
lines
DO
through
D7.
8-51.
Reading
information
from
RAM
U603.
To
read
information
from
RAM
U603,
the
microprocessor:
©
Sets
the
read/write
(R/#)
output
(U601,
pin
32)
high.
©
Sets
the
address
code
of
the
memory
location
to
be
read
onto
address
lines
AO
through
A12
©
Sets
at
least
one
of
the
following
address
lines,
A6-A12.
high
in
order
to
place
the
output
of
NOR
gate
U606c
low
(Ram).
©
Sets
address
lines
A13,
Al4
and
AIS
low
to
enable
NOR
gate
U606a,
The
combination
of
addresses
A6-A15
required
to
enable
the
RAM
effectively
maps
processor
memory
locations
40-1
FFF
into
U603.
The
positive
portion
of
timing
signal
€+9
(U624a
pin
3)
and
the
high
R/W
signal
pulses
the
output
of
gate
U623a
(RD)
low
to
enable
the
output
of
RAM
U603.
The
microprocessor
then
reads
the
information
from
data
bus
lines
DO
through
D7.
8-52.
Writing
to
the
unprotected
section
of
RAM
U603.
To
write
to
the
unprotected
section
of
RAM
U603,
the
microprocessor:
©
Sets
the
read/write
(R/W)
output
(U601,
pin
32)
low.
©
Sets
the
address
code,
of
the
memory
location
where
the
information
is
to
be
stored,
onto
address
lines
AO
through
A12.
(When
addressing
the
unprotected
section
of
U603,
at
least
one
of
the
address
lines
A9-A
12
will
be
set
high
forcing
the
output
of
U608a
high).
©
Sets
address
lines
A13-A15
low
to
force
the RAM
output
of
decoder
U606a
high.
Since
at
least
one
of
the
address
lines
A9-A12
is
high
the
output
of
U608a
is
forced
high
(CALRAM),
This
output
is
inverted
by
inverter
U634c
forcing
the
input
to
AND
gate
U622b
low.
The
low
output
of
gate
U622b
is
input
to
NOR
gate
U642c
which
causes
the
output
of
U642c
to
track
its
other
input,
the
timing
signal
—+0.
The
low
portion
of
the
timing
signal
activates
the
input
of
RAM
U603
through
control
line
EN3
(RAM
603
pin
27).
The
microprocessor
then
writes
the
information
to
U603
through
data
lines
DO
through
D7.
HP
3457A
Multimeter
8-24

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