IEC 30 Series - Page 24

3-4
SECTION 3
thereby inscribe a sinewave into the original
trimble waveform. IC6 functions as an invert-
ing operational differential buffer amplifier
with emitter follower output, which reconsti-
tutes the peak-to-peak value of the sinewave
to the same amplitude as the incoming tri-
angle. Potentiometer R81 adjusts the gain of
the buffer amplifier. Q13 and Q14 act as
diode shunts as well as common-base amp-
lifiers which aid in the generation of a zero
slope at the sine peaks. This is done by in-
jecting a common mode signal via R98 and
R97 into the noninverting side of the buffer
amplifier.
3-5. VARIABLE PULSE GENERATOR (F33.
F34. only)
Variable pulses are generated by comparing
the voltage summation of the triangle wave-
form plus an adjustable d-c level (R248, V AR
PULSE control) to a reference level by use of
a differential pair, Q60 and Q59. Q60 and Q59,
in addition, form a "Schmitt trigger" in con-
junction with R245 and R241 which provide
positive feedback and hysteresis. When the
triangle amplitude at Q60 base rises above the
d-c level at Q59, Q60 turns on forcing Q59 off.
The complementary emitter follower output,
Q57 and Q58, then switches from -3 to + 3-volt
output. The output will remain at + 3 volts until
the triangle waveform ramps negatively through
the reference level at which time the output
goes to -3 volts.
3-6. OUTPUT AMPLIFIER
The output amplifier provides an inverted
20-volt, peak-to-peak output from a 6-volt,
peak-to-peak level present at waveform switch
S3. A 50-ohm source resistance allows 10 volts
peak-to-peak into a 50-ohm load.
IC9, Q17, and Q18 form a high-gain differ-
ential amplifier to drive a complementary
follower, Q19 and Q20. Feedback controls R166
and C58 adjust the gain and transient response
of the amplifier, while RU9 is used to adjust
offset. A constant current from Q33 is used to
maintain slew rates and waveform quality at
low-line potentials.
Offset capability is provided by inserting a
variable d-c current into amplifier summing
point IC9, pin 9, via R134.
3-7. LOGIC CIRCUITS (F33. F34 only)
All functional modes are accomplished by
comparator amplifier IC 13, four TTL and gates,
IC14, and mode switch S6. The comparator amp-
lifier sums a waveform from the trigger input
connector (or from the sweep waveform) with
a d-c voltage obtained from trigger level con-
trol R270. Depending on the input level and
setting of R270, a positive transition of IC13
pin 9 is achieved once per input waveform.
IC 14 logic levels are + 3 to + 5 volts high and
o to + O. 5 volts low. If either gate input is low,
a
high output results. Both inputs must be high
to obtain a low output. Two of the gates are
arranged to form a flip-flop whose output, TP25,
is used to command all triggered or gatedfunc-
tions. TP25 is normally low and rises to high to
initiate a "run" command. A timing diagram
showing logic sequence is shown in figure 3-2.
• Inputs to the logic section are:
Trigger / Sync connector.
VLS squarewave (t3 volts) indicating
state of main loop.
Sweep "running" signal, TP29.
Sweep waveform (used as "Burst"
trigger).