Imagine DA-DSR6804+D - Signal Flow

Chapter 1
Introduction
4
Copyright © 2011, Harris Corporation
Signal Flow
Figure 1-3 DA-DH6804+D Signal Flow Diagram
Figure 1-4 DA-DHR6804+D S
ignal Flow Diagram
4 x 4
Driver 1
Driver 2
CPU
Monitoring
and Control
Driver 1
Driver 2
HD/SD-SDI In 1
Equalizer
1
HD/SD-SDI In 2
Equalizer
2
HD/SD-SDI Out 1A
HD/SD-SDI Out 1B
HD/SD-SDI Out 1C
HD/SD-SDI Out 1D
HD/SD-SDI Out 2A
HD/SD-SDI Out 2B
HD/SD-SDI Out 2C
HD/SD-SDI Out 2D
4 x 4
HD/SD-SDI In 1
Equalizer
1
Reclock 1
Driver 1
Driver 2
CPU
Monitoring
and Control
HD/SD-SDI In 2
Equalizer
2
Reclock 2
Driver 1
Driver 2
HD/SD-SDI Out 1A
HD/SD-SDI Out 1B
HD/SD-SDI Out 1C
HD/SD-SDI Out 1D
HD/SD-SDI Out 2A
HD/SD-SDI Out 2B
HD/SD-SDI Out 2C
HD/SD-SDI Out 2D