Integra DHC-9.9 Service Manual

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -27
Q3601 : D707E001BRFP250 (32 bit Floating-Point Digital Signal Processor)
BLOCK DIAGRAM
SYSTEM DIAGRAM
TX-SR876/SA876
Program/Data
RAM
192K Bytes
192
256
Program/Data
ROM Page1
256K Bytes
256
256
256K Bytes
ROM Page3
Program/Data
Program/Data
ROM Page2
256K Bytes
3232
DMPPMP
CSP
32
256
Program
Cache
32K Bytes
64
D1
Data
R/W
R/W
Data
D2
64
256
Program
Fetch
INTI/O
C67x+ CPU
Memory
Controller
32
High-Performance
Crossbar Switch
32
McASP DMA Bus
JTAG EMU
32
32
32
32
32
32
32
Peripheral Configuration Bus
EMIF
32
Events
In
32
MAX1MAX0
32
CONTROL
32
Interrupts
Out
I/O
dMAX
McASP0
16 Serializers
McASP1
6 Serializers
McASP2
2 Serializers
DIT Only
SPI1
SPI0
I2C1
I2C0
RTI32
PLL
32
32
32
32
192K
Bytes
RAM
Bytes
ROM
768K
Memory Controller
C67x+
DSP Core
Program
Cache
Crossbar Switch
EMIF
dMAX
McASP0
SPI1
McASP1
I2C0
I2C1
RTI
SPIO
McASP2
PLL OSC
ASYNC
FLASH
100 MHz
SDRAM
DSP
Host
Microprocessor
Audio Zone 1
SPI or I2C
Control (optional)
Audio Zone 2
Audio Zone 3
CODEC, DIR,
ADC, DAC, DSD,
Network
CODEC, DIR,
ADC, DAC, DSD,
Network
Digital Out
DSP Control
SPI or I2C
5 Independent Audio
Zones (3 TX + 2 RX)
16 Serial Data Pins
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com

Integra DHC-9.9 Specifications

General

Brand	Integra
Model	DHC-9.9
Category	Controller
Language	English