Integra DHC-9.9

Q1022: R1EX25064ASA(8192 x 8 bit EEPROM)
BLOCK DIAGRAM
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -40
TERMINAL DESCRIPTION
PIN LAYOUT
C
D
Q
S
W
HOLD
VCC
VSS
Serial clock
Serial data input
Serial data output
Chip select
Write protect
Hold
Supply voltage
Ground
PIN NAME FUNCTION
VCC
VSS
S
W
C
HOLD
D
Q
High voltage generation
Memory array
Y-select & Sense amp.
Serial-parallel converter
Control logic
Address generation
X-decoder Y-decoder
TX-SR876/SA876
1
2
3
4
8
7
6
5
S
Q
W
VSS
VCC
HOLD
C
D
w w w . x i a o y u 1 6 3 . c o m
Q Q
3
7
6 3
1 5 1 5
0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
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