Integra DPS-5.4 - Page 61

Q802 : MPD789071MC 8-Bit Microprocessor
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30
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P10
P31/BZO90
IC
RESET
X2
X1
Vss
Vdd
P30/TO90
P27/TI80/TO80
P26/INTP2/CPT90
P25/INTP1
P24/INTP0
P23/SS20
P22/SI20/Rx20
P11
P12
P13
P14
P15
P00
P01
P02
P03
P04
P05
P06
P07
P20/SCK20/ASCK20
P21/SO20/TxD20
PIN LAYOUT
8-bit TIMER/ EVENT
COUNTER80
16-bit TIMER
COUNTER90
WATCHDOG TIMER
SIO20
INTERRUPT
CONTROL
VDD Vss IC
RAM
256 bite
78K/OS
CPU CORE
ROM
2K bite
PORT0
PORT1
PORT3
SYSTEM
CONTROL
P00-P07
P10-P15
P20-P27
P30,P31
RESET
X1
X2
PORT1
DPS-5.4
IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION