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Intel 80286 User Manual

Intel 80286
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MEMORY MANAGEMENT AND VIRTUAL ADDRESSING
+7
i!:!
..
m
+5
a:
+3
t1
..
o 7
INTEL
RESERVED'
MUST
BE
0
TYPE
I A I
BASE
23
·
1
e
BASE,s·o
LIMIT
15.0
15
B 7
ACCESS
RIGHTS
BYTES:
P
PRESENT
DPL
DESCRIPTOR
PRIVILEGE
LEVEL
S =
SEGMENT
DESCRIPTOR
TYPE
-
SEGhfENT
TYPE
AND
ACCESS
INFORMATION
(I.e
Figure
6·7)
A =
ACCESSED
.
MUST
BE
SET
TO
0
FOR
COMPATIBILITY
WITH
IApX
3B6
-4
+2
Figure 6·3. Code or Data Segment Descriptor
(S
=
1)
G30108
are segment descriptors for all of the segments that comprise a system's global address space. Similarly,
within a task's LDT, there must be a descriptor for each of the segments
that
are to
be
included
in
that
task's local address space.
Each local descriptor table
is
itself a special system segment, recognizable
as
such by the 80286 archi-
tecture and described
by
a specific type
of
segment descriptor (see figure 6-4). Because there
is
only a
single
GDT
segment, it
is
not defined by a segment descriptor. Its base and size information
is
maintained
in a dedicated register, GDTR,
as
described below (section 6.6.2).
Similarly, there
is
another dedicated register within the 80286, LDTR,
that
records the base and size
of
the current
LDT
segment (i.e., the
LDT
associated with the currently executing task). The
LDTR
register state, however,
is
volatile: its contents are automatically altered whenever a task switch
is
made
from one task to another. An alternate specification independent of changeable register contents must
therefore exist for each
LDT
in
the system. This independent specification
is
accomplished by means
of
special system segment descriptors known as descriptor table descriptors or
LDT
descriptors.
Figure 6-4 shows the format of a descriptor' table descriptor. (Note
that
it
is
distinguished from an
ordinary segment descriptor by the contents of certain bits
in
the access byte.) This special type
of
descriptor
is
used to specify the physical base address and size of a local descriptor table
that
defines
the virtual address space and address mapping for an individual user or task (figure 6-5).
Each
LDT
segment in a system must lie within
that
system's global address space. Thus, all of the
descriptor table descriptors must be included among the entries
in
the global descriptor table (the
GDT)
of a system. In fact, these special descriptors may appear only
in
the GDT. Reference to an
LDT
descriptor within an
LDT
will cause a protection violation. Even though they are
in
the global
address space available to all tasks, the descriptor table descriptors are protected from corruption within
the
GDT
since they are special system segments and can only be accessed for loading into the
LDTR
register.
6-5
pcjs.org

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Intel 80286 Specifications

General IconGeneral
Processor TypeMicroprocessor
Clock Speed6 MHz to 25 MHz
Transistor Count134, 000
Addressable Memory16 MB
Instruction Setx86
Architecturex86
Data Bus Width16-bit
Address Bus Width24-bit
Operating ModesReal mode, Protected mode
Process Technology1.5 µm
Voltage5V
Introduced1982
Package68-pin PGA

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