Intel 80286 User Manual

TASKS AND STATE TRANSITIONS
Once access to the task gate has been verified, the TSS selector from the gate is read. The RPL of the
TSS selector
is ignored. From this point, all the checks and actions performed for a JMP or CALL to
a TSS after access has been verified are performed (see section 8.4). Figure
8-4 illustrates an example
of a task switch through a task gate.
TASK A
TASK B
f f
{
LOT DESCRIPTOR
LOT
I
I
SELECTOR I----
TSS DESCRIPTOR
-
TASK GATE
LOT SELECTOR
t
l'
LOT
L
LOT SELECTOR
LOT DESCRIPTOR
_
TSS DESCRIPTOR
BACK LINK
TSS
TSS
GOT
G30108
Figure 8-4. Task Switch Through a Task Gate
8-9
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Intel 80286 Specifications

General

Processor Type	Microprocessor
Clock Speed	6 MHz to 25 MHz
Transistor Count	134, 000
Addressable Memory	16 MB
Instruction Set	x86
Architecture	x86
Data Bus Width	16-bit
Address Bus Width	24-bit
Operating Modes	Real mode, Protected mode
Process Technology	1.5 µm
Voltage	5V
Introduced	1982
Package	68-pin PGA