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Intel 80286 User Manual

Intel 80286
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80286
eASE ARCHITECTURE
Table 2-2.
Segment
Register
Selection
Rules
Memory
Segment Register Implicit Segment
Reference Needed
Used
Selection Rule
Instructions
Code
(CS)
Automatic with instruction prefetch.
Stack
Stack
(SS)
All stack pushes and pops. Any memory refer-
ence which uses
BP
as
a base register.
Local Data
Data
(OS)
All data references except when relative to stack
or string destination.
External (Global) Data Extra
(ES)
Alternate data segment and destination
of
string
operation.
The 80286 instruction set defines special instruction prefix elements (see Appendix B). One of these
is
SEG, the segment-override prefix. Segment-override prefixes allow an explicit segment selection. Only
in two special
cases-namely,
the use of DI to reference destination strings in the ES segment, and the
use of
SP
to
reference stack locations in the SS
segment-is
there an implied segment selection which
cannot be overridden. The format of segment override prefixes
is
shown in Appendix
B.
2.4.3.2
OFFSET COMPUTATION
The offset within the desired segment
is
calculated in accordance with the desired addressing mode.
The offset
is
calculated by taking the sum of up to three components:
the displacement element in the instruction
the base (contents of BX or
BP-a
base register)
the index (contents of
SI
or
DI-an
index register)
Each of the three components of an offset may be either a positive or negative value. Offsets are
calculated modulo
216.
The six memory addressing modes are generated using various combinations of these three compo-
nents. The six modes are used for accessing different types of data stored in memory:
addressing mode
direct address
register indirect
based
indexed
based indexed
based indexed with
displacement
offset
calculation
displacement alone
base
or
index alone
base
+ displacement
index
+ displacement
base
+ index
base
+ index + disp
In
all six modes, the operand
is
located at the specified offset within the selected segment.
All
displace-
ments, except direct address mode, are optionally
8-
or 16-bit values. 8-bit displacements are automat-
ically sign-extended to
16
bits. The six addressing modes are described and demonstrated in the following
section
on
memory addressing modes.
2-19
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Intel 80286 Specifications

General IconGeneral
Processor TypeMicroprocessor
Clock Speed6 MHz to 25 MHz
Transistor Count134, 000
Addressable Memory16 MB
Instruction Setx86
Architecturex86
Data Bus Width16-bit
Address Bus Width24-bit
Operating ModesReal mode, Protected mode
Process Technology1.5 µm
Voltage5V
Introduced1982
Package68-pin PGA

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