Intel 80286 User Manual

2.4.3.3 MEMORY MODE
80286 BASE ARCHITECTURE
MODULE A
MODULE B
PROCESS
STACK
PROCESS
DATA
BLOCK 1
r---...,
I I
DATA
CODE
DATA
I
I
I I
I I
I I
[l
BLOCK 2
I I
L ___ .J
MEMORY
CPU
L
I-
CODE
DATA
STACK
-
I-
EXTRA
SEGMENT
REGISTERS
Figure 2-12. Use of Memory Segmentation
Two modes are !.!sed for simple scalar operands located in memory:
G301uo
Direct Address Mode. The offset of the operand is contained in the instruction as the displacement
element. The offset
is a 16-bit quantity.
Register Indirect Mode. The offset of the operand
is in one of the registers SI, DI, or BX. (BP is
excluded; if BP is used as a stack frame base, it requires an index or displacement component to
reference either parameters passed on the stack or temporary variables allocated on the stack. The
instruction level bit encoding for the BP only address mode
is used to specify Direct Address
mode. See Chapter
12 for more details.)
2-20
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Intel 80286 Specifications

General

Processor Type	Microprocessor
Clock Speed	6 MHz to 25 MHz
Transistor Count	134, 000
Addressable Memory	16 MB
Instruction Set	x86
Architecture	x86
Data Bus Width	16-bit
Address Bus Width	24-bit
Operating Modes	Real mode, Protected mode
Process Technology	1.5 µm
Voltage	5V
Introduced	1982
Package	68-pin PGA