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Intel 80286 User Manual

Intel 80286
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2.4.3.3
MEMORY MODE
80286
BASE ARCHITECTURE
MODULE A
MODULE B
PROCESS
STACK
PROCESS
DATA
BLOCK 1
r---...,
I I
DATA
CODE
DATA
I
I
I I
I I
I I
[l
BLOCK 2
I I
L
___
.J
MEMORY
CPU
L
I-
CODE
DATA
STACK
-
I-
EXTRA
SEGMENT
REGISTERS
Figure 2-12. Use of Memory Segmentation
Two modes are
!.!sed
for
simple
scalar operands located
in
memory:
G301uo
Direct Address Mode. The offset of the operand
is
contained
in
the instruction
as
the displacement
element. The offset
is
a 16-bit quantity.
Register Indirect Mode. The offset of the operand
is
in one of the registers SI, DI, or
BX.
(BP
is
excluded; if BP
is
used
as
a stack frame base, it requires an index
or
displacement component to
reference either parameters passed
on
the stack or temporary variables allocated
on
the stack. The
instruction level bit encoding for the BP only address mode
is
used to specify Direct Address
mode. See Chapter
12
for more details.)
2-20
pcjs.org

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Intel 80286 Specifications

General IconGeneral
Processor TypeMicroprocessor
Clock Speed6 MHz to 25 MHz
Transistor Count134, 000
Addressable Memory16 MB
Instruction Setx86
Architecturex86
Data Bus Width16-bit
Address Bus Width24-bit
Operating ModesReal mode, Protected mode
Process Technology1.5 µm
Voltage5V
Introduced1982
Package68-pin PGA

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