Intel 80286 User Manual

TABLE OF CONTENTS
Page
Software Initiated Interrupts .......................................................................................... 9-3
Interrupt Gates and Trap Gates ..................................................................................... 9-3
Task Gates and Interrupt Tasks .................................................................................... 9-7
Scheduling Considerations ........... ...... ......... ...................................... ..... ............ ........ 9-8
Deciding Between Task, Trap, and Interrupt Gates ................................ .................. 9-8
Protection Exceptions
and Reserved Vectors .............................................................. 9-9
Invalid OP-Code (Interrupt
6) ...................................................................................... 9-10
Double Fault (Interrupt
8) ............................................................................................ 9-10
Processor Extension Segment Overrun (Interrupt
9) ................................................ 9-10
Invalid Task State Segment (Interrupt 1
0) ................................................................. 9-11
Not Present (Interrupt 11) ........................................................................................... 9-11
Stack Fault (Interrupt 12) ............................................................................................ 9-12
General Protection Fault (Interrupt 13) ...................................................................... 9-13
Additional Exceptions
and Interrupts ............................................................................ 9-13
Single Step Interrupt (Interrupt 1) .............................................................................. 9-14
CHAPTER
10
SYSTEM CONTROL AND INITIALIZATION
System Flags and Registers .... .......... ......... ......... ................ ...... ...................... ..... .......
10-1
Descriptor Table Registers ....................................................................................... 10-1
System Control Instructions ........................................................................................ 10-3
Machine Status Word ............................................................................................... 10-4
Other Instructions .................................................. ................................................... 10-5
Privileged and Trusted Instructions ............................................................................. 10-5
Initialization ................................................................................................................... 10-6
Real Address Mode .................................................................................................. 10-7
Protected Mode ........................................................................................................ 10-7
CHAPTER 11
ADVANCED TOPICS
Virtual Memory Management . ........ ..................... ..... ........................................... .........
11-1
Special Segment Attributes ................................... ... .................................................... 11-1
Conforming Code Segments .................................................................................... 11-1
Expand-Down Data Segments ........ .......... ................. .......... ............................ ..... ... 11-2
Pointer Validation ......................................................................................................... 11-3
Descriptor Validation ..................................................................... ........................... 11-4
Pointer Integrity: RPL and the "Trojan Horse Problem" ........................................ 11-4
NPX Context Switching ................................................................................................ 11-5
Multiprocessor Considerations ............................................................. ....................... 11-5
Shutdown ............................................................................................. ;........................ 11-7
APPENDIX A
80286 SYSTEM INITIALIZATION
APPENDIX B
THE
80286 INSTRUCTION SET
APPENDIX C
8086/8088 COMPATIBILITY CONSIDERATIONS
APPENDIX D
80286/80386 SOFTWARE COMPATIBILITY CONSIDERATIONS
INDEX
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Intel 80286 Specifications

General

Processor Type	Microprocessor
Clock Speed	6 MHz to 25 MHz
Transistor Count	134, 000
Addressable Memory	16 MB
Instruction Set	x86
Architecture	x86
Data Bus Width	16-bit
Address Bus Width	24-bit
Operating Modes	Real mode, Protected mode
Process Technology	1.5 µm
Voltage	5V
Introduced	1982
Package	68-pin PGA