Intel 80286 - Page 31

80286 BASE ARCHITECTURE
7 0
II I I I 1 I I I
SIGN BIT -lj I
MAGNITUDE
7 0
I I I I I I II I
ILMSB I
MAGNITUDE
1514 + 1 87 0 0
II Ii I I II I Ii I I Ii I I
SIGN BIT -I j L- MSB 1
MAGNITUDE
31 +3 +2 1615 + 1 0 0
SIGNED 11" II II II I I II I I I Ii I III I II II III I I
SIGN BIT ...I IL MSB 1
MAGNITUDE
+7
+6 +5
+4 +3
+2 +1
0
63 4847
3231
1615 0
SIGNED QUAD II
WORD'
I
I I I
SIGN BIT JIL MSB
MAGNITUDE
+1 0 0
1:1 I II 11I1 I II 1 I 1 I
I MSB I
MAGNITUDE
7 +N 0
DECIMAL I.. ___ -'.
(BCD) N
7 +N 0
ASCIIIIIIIIIII
ASCII
CHARACTER
N
7 +N 0
II I I II I I I
MOST
SIGNIFICANT DIGIT
7 +1 07 0 0
II ill Iii 11111"1 I
BCD BCD
DIGIT 1 DIGIT 0
7 +1 07 0 0
lilllllIlllIlllIl
ASCII ASCII
CHARACTER
,
CHARACTER
O
7 +1 07 0 0
I i Ii Iii i II I I I" i I
LEAST
SIGNIFICANT DIGIT
7/15+
N
0 7/15+
1
07/15
0
0
STRING I I II II III I I I I III I II I I III I I
BYTE/WORD N BYTE/WORD 1 BYTE/WORD 0
31 +3 +2 1615 + 1 0 0
POINTER I I i I II I I II I I II I I II I I II i I II I I I 1 I I I
I I
SELECTOR
OFFSET
79 +9
+8
+7 +6 +5
+4 +3 +2
+1
FLOATING II
POINT'
SIGN BIT ...II
EXPONENT
MAGNITUDE
0
0
I
Figure 2·3. 80286/80287 Supported Data Types
2-5
'SUPPORTED BY
80287
NUMERIC DATA
PROCESSOR
CONFIGURATION
G30108
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