OVERVIEW OF NUMERIC PROCESSING
Table 1-4. Interpreting the
NPX
Condition Codes
Instruction
C.
C.
C,
C.
Interpretation
Type
Compare, Test
0 0
X 0
ST
> Source
or
0
(FTST)
0 0
X 1
ST
< Source or 0
(FTST)
1
0
X
0
ST
= Source
or
0
(FTST)
1 1 X 1
ST
is
not
comparable
Remainder
Q,
0
Q.
Q.
Complete
reduction
with
three
low
bits
of
quotient
in
Co,
C
3
,
and
C,
U
1
U U
Incomplete
Reduction
Examine
0 0
0
0
Valid,
positive
unnormalized
0 0 0 1
Invalid,
positive,
exponent = 0
0 0
1 0
Valid,
negative,
un
normalized
0 0 1 1
Invalid,
negative,
exponent = 0
0
1
0 0
Valid,
positive,
normalized
0
1
0
1
Infinity,
positive
0
1 1
0
Valid,
negative,
normalized
0 1 1 1
Infinity,
negative
1 0
0
0
Zero,
positive
1
0 0 1
Empty
Register
1
0 1 0
Zero,
negative
1
0
1 1
Empty
Register
1 1
a 0
Invalid,
positive,
exponent = 0
1 1
0 1
Empty
Register
1 1 1
0
Invalid,
negative,
exponent = 0
1 1 1 1
Empty
Register
NOTES:
1.
ST
=
Top
of
stack
2.
X =
value
is
not
affected
by
instruction
3.
U =
value
is
undefined
following
instruction
4.
Q
n
=
Quotient
bit
n
following
complete
reduction
(C.=O)
The low-order byte of this control
word
configures the
80287
error and exception masking.
Bits
0-5 of
the control
word
contain individual masks
for
each of the
six
exception conditions recognized
by
the
80287. The high-order byte of the control
word
configures the
80287
processing options, including
• Precision control
• Rounding control
• Infinity control
The Precision control bits (bits
8-9)
can
be
used
to
set the
80287
internal operating precision at
less
than the default precision (64-bit significand). These control bits can
be
used
to
provide compatibility
with the earlier-generation arithmetic processors having
less
precision than the 80287,
as
required
by
the IEEE
754
standard. Setting a
lower
precision,
however,
will
not
affect the execution time
of
numeric
calculations.
The rounding control bits (bits
10-11)
provide
for
directed rounding
and
true
chop
as
well
as
the
unbiased
round-to-Ilearest-even
mode
specified
in
the IEEE
754
standard.
1-11
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