Intel 80286 User Manual

A
B
DQ
DQ
FLD
FCOMP
FSTSW
,
A
B
A X
NUMERIC PROGRAMMING EXAMPLES
LOAD A ONTO TOP OF 287 STACK
COMPARE A:B, POP A
STORE RESULT TO CPU AX REGISTER
; CPU AX REGISTER CONTAINS CONDITION CODES (RESULTS OF
; COMPARE>
; LOAD CONDITION CODES INTO CPU FLAGS
SAHF
;
; USE CONDITIONAL JUMPS TO DETERMINE ORDERING OF A TO
; B
,
J P
JB
J E
LLU NOR D ERE D
LLESS
LEQUAL
;
TE S T
C
2
(P F>
TE S T
CO
( C F )
TE S T C3
(Z F)
LG REA TE R : CO
(C F>
·
o ,
C3
( ZF)
·
0
CO
( C F )
·
o ,
C3
(ZF )
·
1
CO
( C F )
·
1,
C3
(ZF )
·
0
LLUNORDERED:
C2 (PF) • 1
Figure 4-1. Conditional Branching for Compares
JUMP TABLE FOR EXAMINE ROUTINE
FXAM_TBL DW POS_UNNORM, POS_NAN, NEG_UNNORM, NEG_NAN,
POS NORM. POS_INFINITY, NEG_NORM,
NEG_INFINITY, POS_ZERO, EMPTY,
EM P T Y, PO S_D E NOR M, EM P T Y, N E G_D E NOR M, EM P T Y
;
EXAMINE ST AND STORE RESULT (CONDITION CODES)
F X A M
FSTSW AX
Figure 4-2. Conditional Branching for FXAM
4-2
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Intel 80286 Specifications

General

Processor Type	Microprocessor
Clock Speed	6 MHz to 25 MHz
Transistor Count	134, 000
Addressable Memory	16 MB
Instruction Set	x86
Architecture	x86
Data Bus Width	16-bit
Address Bus Width	24-bit
Operating Modes	Real mode, Protected mode
Process Technology	1.5 µm
Voltage	5V
Introduced	1982
Package	68-pin PGA