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Intel 80286 User Manual

Intel 80286
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BASIC INSTRUCTION SET
Example: AND WORDOPRND,
BX.
Replaces the contents of WORDOPRND with the logical
"and"
of the contents of the memory word labeled WORDOPRND and the contents of
BX.
NOT
(Not) inverts the bits
in
the specified operand to form a one's complement of the operand.
NOT
has
no
effect
on
the flags.
Example:
NOT
BYTEOPRND. Replaces the original contents of BYTEOPRND with the one's
complement of the contents of the memory word labeled BYTEOPRND.
OR
(Or)
performs the logical "inclusive or" of the
two
operands and returns the result to the destina-
tion operand.
OR
clears OF and DF, leaves AF undefined, and updates SF, ZF, and PF.
Example:
OR
AL,5. Replaces the original contents of AL with the logical "inclusive or" of the contents
of AL and the immediate value
5.
XOR
(Exclusive OR) performs the logical "exclusive or" of the two operands and returns the result
to
the destination operand. XOR clears OF and DF, leaves AF undefined, and updates SF, ZF, and PF.
Example: XOR DX, WORDOPRND. Replaces the original contents of DX with the logical "exclu-
sive
or"
or
the
contents of
DX
and
the
contents of
the
memory word labeled
WORDOPRND.
NEG
(Negate) forms a two's complement of a signed byte or word operand. The effect of
NEG
is
to
reverse the sign of the operand from positive to negative or from negative to positive.
NEG
updates
OF, SF, ZF, AF, PF, and CF.
Example:
NEG
AX. Replaces the original contents of AX with the two's complement of the contents
of AX.
3.4.2
Shift and Rotate Instructions
The shift and rotate instructions reposition the bits within the specified operand. The shift instructions
provide a convenient way to accomplish division or multiplication by binary power. The rotate instruc-
tions are useful for bit testing.
3.4.2.1 SHIFT INSTRUCTIONS
The bits in bytes and words may be shifted arithmetically or logically. Depending
on
the value of a
specified count, up to
31
shifts may be performed.
A shift instruction can specify the count
in
one of three ways. One form of shift instruction implicitly
specifies the count as a single shift. The second form specifies the count
as
an immediate value. The
third form specifies the count
as
the value contained
in
CL. This last form aiiows the shin to
t;;
a variable that the program supplies during execution. Only the
low
order 5 bits of
CL
are used.
Shift instructions affect the flags
as
follows.
AF
is
always undefined following a shift operation. PF,
SF, and
ZF
are updated normally
as
in
the logical instructions.
CF
always contains the value of the last bit shifted out of the destination operand. In a single-bit shift,
OF
is
set if the value of the high-order (sign) bit
was
changed
by
the operation. Otherwise, OF
is
cleared. Following a multibit shift, however, the content of OF
is
always undefined.
3-10
pcjs.org

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Intel 80286 Specifications

General IconGeneral
Processor TypeMicroprocessor
Clock Speed6 MHz to 25 MHz
Transistor Count134, 000
Addressable Memory16 MB
Instruction Setx86
Architecturex86
Data Bus Width16-bit
Address Bus Width24-bit
Operating ModesReal mode, Protected mode
Process Technology1.5 µm
Voltage5V
Introduced1982
Package68-pin PGA

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