Intel 8086 User Manual

8086
A.C. CHARACTERISTICS (Continued)
TIMING RESPONSES
Symbol Parameter
8086 8086-1 8086-2
Units
Test
Min Max Min Max Min Max
Conditions
TCLML Command Active 10 35 10 35 10 35 ns
Delay (See Note 1)
TCLMH Command Inactive 10 35 10 35 10 35 ns
Delay (See Note 1)
TRYHSH READY Active to 110 45 65 ns
Status Passive (See
Note 3)
TCHSV Status Active Delay 10 110 10 45 10 60 ns
TCLSH Status Inactive 10 130 10 55 10 70 ns
Delay
TCLAV Address Valid Delay 10 110 10 50 10 60 ns
TCLAX Address Hold Time 10 10 10 ns
TCLAZ Address Float Delay TCLAX 80 10 40 TCLAX 50 ns
TSVLH Status Valid to ALE 15 15 15 ns
High (See Note 1)
TSVMCH Status Valid to 15 15 15 ns
MCE High (See
Note 1)
TCLLH CLK Low to ALE 15 15 15 ns C
L
e
20– 100 pF
for all 8086
Valid (See Note 1)
Outputs (In
TCLMCH CLK Low to MCE 15 15 15 ns
addition to 8086
High (See Note 1)
self-load)
TCHLL ALE Inactive Delay 15 15 15 ns
(See Note 1)
TCLMCL MCE Inactive Delay 15 15 15 ns
(See Note 1)
TCLDV Data Valid Delay 10 110 10 50 10 60 ns
TCHDX Data Hold Time 10 10 10 ns
TCVNV Control Active 5 45 5 45 5 45 ns
Delay (See Note 1)
TCVNX Control Inactive 10 45 10 45 10 45 ns
Delay (See Note 1)
TAZRL Address Float to 0 0 0 ns
READ Active
TCLRL RD Active Delay 10 165 10 70 10 100 ns
TCLRH RD Inactive Delay 10 150 10 60 10 80 ns
20

Intel 8086 Specifications

General

Architecture	x86
Clock Speed	5 MHz to 10 MHz
Data Width	16-bit
Address Bus Width	20-bit
Transistor Count	29, 000
Instruction Set	x86
Package	40-pin DIP
Microarchitecture	8086
Addressable Memory	1 MB
Manufacturing Process	3 μm
Voltage	+5V
Introduced	1978
Registers	14 registers (including segment registers)